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git01.mediatek.com / filogic / atf / 92712a56294c6f81d26cb090164fccb789878062 / bl31
  1. 18a6204 Replace build macro WARN_DEPRECATED with ERROR_DEPRECATED by Soby Mathew · 9 years ago
  2. 489c939 Merge pull request #424 from jcastillo-arm/jc/tf-issues/327 by Achin Gupta · 9 years ago
  3. 53c5184 IMF: postpone SCR_EL3 update if context is not initialized by Juan Castillo · 9 years ago
  4. b2e224c Introduce print_entry_point_info() function by Sandrine Bailleux · 9 years ago
  5. 405fafe Fix relocation of __PERCPU_BAKERY_LOCK_SIZE__ by Vikram Kanigiri · 9 years ago
  6. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  7. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  8. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  9. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  10. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 10 years ago
  11. 9ccbc03 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  12. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  13. acde8b0 Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  14. 979992e Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  15. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  16. 00f58f0 Merge pull request #268 from vikramkanigiri/vk/move_init_cpu_ops by danh-arm · 10 years ago
  17. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  18. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · 10 years ago
  19. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  20. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  21. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  22. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  23. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  24. fd8c077 Fix LENGTH attribute value in linker scripts by Juan Castillo · 10 years ago
  25. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  26. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  27. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  28. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  29. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  30. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  31. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  32. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · 10 years ago
  33. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  34. 71ac11f Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  35. 91b624e Rationalize console log output by Dan Handley · 10 years ago
  36. 0c70c57 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  37. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  38. 6dc22e3 Merge pull request #178 from soby-mathew/sm/optmize_el3_context by danh-arm · 10 years ago
  39. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · 10 years ago
  40. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  41. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  42. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  43. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  44. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 10 years ago
  45. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  46. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  47. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  48. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  49. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  50. 04be3a5 Add support for printing version at runtime by Juan Castillo · 10 years ago
  51. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · 10 years ago
  52. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  53. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · 10 years ago
  54. 47a6483 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 10 years ago
  55. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  56. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  57. 258e94f Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  58. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  59. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  60. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  61. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  62. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  63. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  64. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  65. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  66. e385767 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  67. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  68. 385f4d4 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  69. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  70. af1ef2b Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  71. df87323 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · 10 years ago
  72. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  73. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  74. 614f395 Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · 10 years ago
  75. 701fea7 Further renames of platform porting functions by Dan Handley · 10 years ago
  76. 7ce42df Move BL porting functions into platform.h by Dan Handley · 10 years ago
  77. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  78. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  79. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  80. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  81. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  82. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  83. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 10 years ago
  84. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  85. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago
  86. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  87. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  88. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  89. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  90. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  91. e2e9fb8 Merge pull request #83 from athoelke/at/tf-issues-126 by Andrew Thoelke · 10 years ago
  92. b058556 Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · 10 years ago
  93. d1b6015 Add build configuration for timer save/restore by Jeenu Viswambharan · 10 years ago
  94. 2ecdd8f Set SCR_EL3.RW correctly before exiting bl31_main by Andrew Thoelke · 10 years ago
  95. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  96. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 11 years ago
  97. 1644425 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · 11 years ago
  98. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  99. f977ed8 Access system registers directly in assembler by Andrew Thoelke · 11 years ago
  100. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · 11 years ago