- a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 7 months ago
- 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · 3 years, 3 months ago
- a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 9 months ago
- dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 2 years, 8 months ago
- f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
- 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · 2 years, 9 months ago
- c353b0a Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration by Madhukar Pappireddy · 2 years, 9 months ago
- 380924d fix(intel): assert if bl_mem_params is NULL pointer by Siew Chin Lim · 3 years, 5 months ago
- ae4cd3a fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 1 month ago
- cf93158 plat/intel: do not keep mmc_device_info in stack by Yann Gautier · 3 years, 8 months ago
- 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 4 years, 6 months ago
- 2382b11 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · 4 years, 7 months ago
- 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · 4 years, 6 months ago
- fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 4 years, 6 months ago
- 7a5f8da plat: intel: Fix clock configuration bugs by Tien Hock Loh · 4 years, 6 months ago
- 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · 4 years, 9 months ago
- 98b5a11 16550: Use generic console_t data structure by Andre Przywara · 4 years, 10 months ago
- 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 5 years ago
- 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · 4 years, 9 months ago
- 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · 5 years ago
- 786db4d intel: Change boot source selection by Hadi Asyrafi · 4 years, 11 months ago
- 218d8fe intel: agilex: Enable uboot BL31 loading by Hadi Asyrafi · 4 years, 10 months ago
- 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · 5 years ago
- 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 5 years ago
- 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 5 years ago
- 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 5 years ago
- e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · 5 years ago
- 3afb87a intel: Modify non secure access function by Hadi Asyrafi · 5 years ago
- 99361aa Merge "intel: Fix memory calibration" into integration by Manish Pandey · 4 years, 10 months ago
- 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · 4 years, 11 months ago
- 966f282 intel: Fix memory calibration by Hadi Asyrafi · 5 years ago
- 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · 5 years ago
- 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago
- 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
- f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 5 years ago
- 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 5 years ago
- 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 5 years ago
- 91071fc intel: agilex: Fix psci power domain off by Hadi Asyrafi · 5 years ago
- cc077d9 Merge "intel: agilex: Clear PLL lostlock bypass mode" into integration by Paul Beesley · 5 years ago
- 5d7c656 intel: agilex: HMC driver calculate DDR size by Hadi Asyrafi · 5 years ago
- 56c4901 intel: agilex: Clear PLL lostlock bypass mode by Hadi Asyrafi · 5 years ago
- ad90712 Merge "intel: agilex: Fix memory controller driver" into integration by Paul Beesley · 5 years ago
- 83fe38e intel: agilex: Fix memory controller driver by Hadi Asyrafi · 5 years ago
- a813fed intel: agilex: Fix reliance on hard coded clock information by Hadi Asyrafi · 5 years ago
- 462c6c4 Merge changes from topic "intel-plat-refactor" into integration by Sandrine Bailleux · 5 years ago
- 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
- 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
- e944d22 intel: agilex: Fix BL31 memory mapping by Hadi Asyrafi · 5 years ago
- a724e43 intel: agilex: Fix build error by Ambroise Vincent · 5 years ago
- 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago