1. 3901165 Merge pull request #220 from soby-mathew/sm/reassign_crash_console by danh-arm · 10 years ago
  2. 64a76ed Use the BL3-1 runtime console as the crash console. by Soby Mathew · 10 years ago
  3. 42a617d FVP: keep shared data in Trusted SRAM by Juan Castillo · 10 years ago
  4. 00389ed Merge pull request #214 from soby-mathew/sm/bl_specific_mmap by achingupta · 10 years ago
  5. b08bc04 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  6. 383c477 Remove BSS section access by 'plat_print_gic' during crash reporting by Soby Mathew · 10 years ago
  7. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  8. f797cea Rationalize UART usage among different BL stages by Soby Mathew · 10 years ago
  9. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  10. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  11. 1218f11 Rework use of labels in assembly macros. by Soby Mathew · 10 years ago
  12. 8587639 fvp: Rework when platform actions are performed by Achin Gupta · 10 years ago
  13. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  14. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  15. 53c843a Simplify interface to TZC-400 driver by Dan Handley · 10 years ago
  16. 7b83c44 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  17. 3aa9216 Remove redundant io_init() function by Dan Handley · 10 years ago
  18. be234f9 Remove platform dependency in CCI-400 driver by Dan Handley · 10 years ago
  19. 71ac11f Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  20. 48e84b3 FVP: make usage of Trusted DRAM optional at build time by Juan Castillo · 10 years ago
  21. 0d84657 Merge pull request #183 from danh-arm/dh/print_output2 by danh-arm · 10 years ago
  22. 91b624e Rationalize console log output by Dan Handley · 10 years ago
  23. 0c70c57 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  24. 0b6c706 Reduce the runtime stack size in BL stages. by Soby Mathew · 10 years ago
  25. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  26. 9d70f0f Rework the TSPD setup code by Vikram Kanigiri · 10 years ago
  27. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  28. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  29. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  30. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  31. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  32. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  33. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  34. 066f713 Introduce crash console APIs for crash reporting by Soby Mathew · 10 years ago
  35. 69817f7 Parametrize baudrate and UART clock during console_init() by Soby Mathew · 10 years ago
  36. c389d77 Introduce asm console functions in TF by Soby Mathew · 10 years ago
  37. 9c60d80 Remove the concept of coherent stacks by Achin Gupta · 10 years ago
  38. b4fd939 Merge pull request #167 from jcastillo-arm/jc/tf-issues/217 by Dan Handley · 10 years ago
  39. e998254 Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  40. 5fe57c1 Define ARM_GIC_ARCH default value for all platforms by Sandrine Bailleux · 10 years ago
  41. 9a5b56e FVP: Ensure system reset wake-up results in cold boot by Juan Castillo · 10 years ago
  42. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  43. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  44. e8e04ec Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · 10 years ago
  45. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · 10 years ago
  46. 1c54d97 Refactor fvp_config into common platform header by Dan Handley · 10 years ago
  47. e3060e2 fvp: Properly detect the location of BL1 R/W data by Sandrine Bailleux · 10 years ago
  48. 467d057 Remove concept of top/bottom image loading by Sandrine Bailleux · 10 years ago
  49. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  50. 960347d Support later revisions of the Foundation FVP by Andrew Thoelke · 10 years ago
  51. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 10 years ago
  52. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  53. 043f846 Merge pull request #150 from sandrine-bailleux/sb/fix-plat-print-gic-regs by danh-arm · 10 years ago
  54. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  55. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · 10 years ago
  56. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  57. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  58. 21aa520 fvp: Fix register name in 'plat_print_gic_regs' macro by Sandrine Bailleux · 10 years ago
  59. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  60. fb06094 Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · 10 years ago
  61. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  62. f1c7cd7 Merge pull request #143 from athoelke/at/remove-nsram by danh-arm · 10 years ago
  63. 30b04fc Remove NSRAM from FVP memory map by Andrew Thoelke · 10 years ago
  64. 900def0 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · 10 years ago
  65. bb12891 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · 10 years ago
  66. 0572273 Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · 10 years ago
  67. d73898a Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · 10 years ago
  68. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  69. fdad706 Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · 10 years ago
  70. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  71. 1c3e228 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · 10 years ago
  72. 1359236 Enable mapping higher physical address by Lin Ma · 10 years ago
  73. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · 10 years ago
  74. 701fea7 Further renames of platform porting functions by Dan Handley · 10 years ago
  75. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  76. ea45157 Rename FVP specific files and functions by Dan Handley · 10 years ago
  77. 7ce42df Move BL porting functions into platform.h by Dan Handley · 10 years ago
  78. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  79. 60b13e3 Remove unused data declarations by Dan Handley · 10 years ago
  80. a17fefa Remove extern keyword from function declarations by Dan Handley · 10 years ago
  81. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  82. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  83. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · 10 years ago
  84. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  85. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  86. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · 10 years ago
  87. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · 10 years ago
  88. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · 10 years ago
  89. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · 11 years ago
  90. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  91. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · 10 years ago
  92. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · 10 years ago
  93. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · 10 years ago
  94. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  95. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  96. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  97. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  98. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  99. 6bee0fc Merge pull request #69 from sandrine-bailleux:sb/split-mmu-fcts-per-el by Andrew Thoelke · 10 years ago
  100. fe3374b Fixes for TZC configuration on FVP by Andrew Thoelke · 10 years ago