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git01.mediatek.com / filogic / atf / 7a53a91976da5375278add7a97f846647e5c1378 / lib / el3_runtime
  1. 06ea44e refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 17:30:43 2022 +0000
  2. c97c551 refactor(brbe): enable FEAT_BRBE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  3. 191eff6 refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  4. 8258f14 fix(cpufeat): context-switch: move FGT availability check to callers by Andre Przywara · Wed Feb 15 15:56:15 2023 +0000
  5. 9f65721 Merge "fix(context-mgmt): enable SCXTNUM access" into integration by Manish Pandey · Fri Feb 10 12:57:17 2023 +0100
  6. 1e25c5b fix(context-mgmt): enable SCXTNUM access by Maksims Svecovs · Thu Feb 02 16:10:22 2023 +0000
  7. 3dc3cad fix(mpam): run-time checks for mpam save/restore routines by Rohit Mathew · Fri Nov 11 18:45:11 2022 +0000
  8. 27d45ca Merge changes from topic "feat_state_rework" into integration by Manish Pandey · Thu Jan 19 18:19:50 2023 +0100
  9. 1d8795e refactor(context-mgmt): move FEAT_HCX save/restore into C by Andre Przywara · Tue Nov 15 11:45:19 2022 +0000
  10. 5d6d2ab refactor(context-mgmt): move FEAT_FGT save/restore code into C by Andre Przywara · Thu Nov 10 14:40:37 2022 +0000
  11. e8920f6 refactor(cpufeat): decouple FGT feature detection and build flags by Andre Przywara · Thu Nov 10 14:28:01 2022 +0000
  12. ca91d27 fix(mpam): remove unwanted param for "endfunc" macro by Rohit Mathew · Tue Oct 18 22:57:06 2022 +0100
  13. 62d532a fix(el3_runtime): allow SErrors when executing in EL3 by Manish Pandey · Thu Nov 17 15:47:05 2022 +0000
  14. 53bc59a fix(el3_runtime): restore SPSR/ELR/SCR after esb by Manish Pandey · Thu Nov 17 14:43:15 2022 +0000
  15. 181dafb Merge "fix(pmu): add sensible default for MDCR_EL2" into integration by Manish Pandey · Fri Nov 11 16:56:30 2022 +0100
  16. ecd9f08 fix(pmu): add sensible default for MDCR_EL2 by Boyan Karatotev · Wed Oct 26 15:10:39 2022 +0100
  17. 0e3379d fix(ras): restrict RAS support for NS world by Manish Pandey · Mon Oct 10 11:43:08 2022 +0100
  18. b2458b2 Merge "build(changelog): add new scope for Performance Monitor Extensions" into integration by Manish V Badarkhe · Mon Oct 10 11:49:13 2022 +0200
  19. 4ec78ad build(changelog): add new scope for Performance Monitor Extensions by Jayanth Dodderi Chidanand · Mon Sep 19 23:32:08 2022 +0100
  20. 7c6fcb4 fix(ras): trap "RAS error record" accesses only for NS by Manish Pandey · Tue Sep 27 14:30:34 2022 +0100
  21. 785e66c refactor(libc): clean up dependencies in libc by Claus Pedersen · Mon Sep 12 22:42:58 2022 +0000
  22. cc238bb fix(context mgmt): remove explicit ICC_SRE_EL2 register read by Varun Wadekar · Tue Sep 13 12:38:47 2022 +0100
  23. 42305f2 feat(rng-trap): add EL3 support for FEAT_RNG_TRAP by Juan Pablo Conde · Tue Jul 12 16:40:29 2022 -0400
  24. 5362beb refactor(context mgmt): refactor EL2 context save and restore functions by Zelalem Aweke · Mon Apr 04 17:42:48 2022 -0500
  25. 2012600 refactor(context mgmt): refactor initialization of EL1 context registers by Zelalem Aweke · Fri Apr 08 16:48:05 2022 -0500
  26. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · Tue May 10 15:55:05 2022 +0200
  27. e43ba98 Merge "fix(cm): add barrier before el3 ns exit" into integration by Olivier Deprez · Tue May 10 14:15:51 2022 +0200
  28. e4793dd fix(cm): add barrier before el3 ns exit by Olivier Deprez · Mon May 09 17:34:02 2022 +0200
  29. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · Fri Jan 28 17:06:20 2022 -0600
  30. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
  31. 4b5489c refactor(twed): improve TWED enablement in EL-3 by Jayanth Dodderi Chidanand · Mon Mar 28 15:28:55 2022 +0100
  32. f92c0cb refactor(context mgmt): add cm_prepare_el3_exit_ns function by Zelalem Aweke · Mon Jan 31 16:59:42 2022 -0600
  33. 4240111 refactor(context mgmt): refactor the cm_setup_context function by Zelalem Aweke · Wed Jan 05 17:12:24 2022 -0600
  34. bd17eae refactor(context mgmt): remove registers accessible only from secure state from EL2 context by Zelalem Aweke · Wed Nov 03 13:31:53 2021 -0500
  35. 72b69b8 refactor(el3-runtime): replace ARM_ARCH_AT_LEAST macro with FEAT flags by Jayanth Dodderi Chidanand · Wed Jan 26 17:14:43 2022 +0000
  36. 928747f fix(el3-runtime): set unset pstate bits to default by Daniel Boulby · Tue May 25 18:09:34 2021 +0100
  37. 95fb1aa refactor(el3-runtime): add prepare_el3_entry func by Daniel Boulby · Wed Jan 19 11:20:05 2022 +0000
  38. 13ae0f4 fix(amu): fault handling on EL2 context switch by Jayanth Dodderi Chidanand · Thu Nov 25 14:59:30 2021 +0000
  39. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  40. b6301e6 feat(rme): add context management changes for FEAT_RME by Zelalem Aweke · Fri Jul 09 17:54:30 2021 -0500
  41. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  42. 51a9711 feat(trf): enable trace filter control register access from lower NS EL by Manish V Badarkhe · Thu Jul 08 09:33:18 2021 +0100
  43. f356f7e feat(sys_reg_trace): enable trace system registers access from lower NS ELs by Manish V Badarkhe · Tue Jun 29 11:44:20 2021 +0100
  44. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  45. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  46. cac7d16 fix(el3_runtime): fix SVE and AMU extension enablement flags by Arunachalam Ganapathy · Thu Jul 08 09:35:57 2021 +0100
  47. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  48. ba3a098 Merge "fix(security): Set MDCR_EL3.MCCD bit" into integration by Mark Dykes · Tue Jun 08 18:26:52 2021 +0200
  49. 7d0299f fix: random typos in tf-a code base by Olivier Deprez · Tue May 25 12:06:03 2021 +0200
  50. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  51. cf784f7 Fix: Remove save/restore of EL2 timer registers by Max Shvetsov · Wed Mar 31 19:00:38 2021 +0100
  52. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  53. fba2572 Fix exception handlers in BL31: Use DSB to synchronize pending EA by Madhukar Pappireddy · Fri Jul 24 03:27:12 2020 -0500
  54. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  55. 04b7e43 lib: el3_runtime: Fix SPE system registers in el2_sysregs_context by Arunachalam Ganapathy · Fri Oct 09 14:51:41 2020 +0100
  56. dd3ec7e lib: el3_runtime: Conditionally save/restore EL2 NEVE registers by Arunachalam Ganapathy · Thu May 28 11:57:09 2020 +0100
  57. dca591b lib: el3_runtime: Fix aarch32 system registers in el2_sysregs_context by Arunachalam Ganapathy · Tue May 26 11:32:35 2020 +0100
  58. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  59. 4283ed1 SPM: Change condition on saving/restoring EL2 registers by Ruari Phipps · Tue Jul 28 11:26:29 2020 +0100
  60. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  61. 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · Tue Jul 28 07:22:30 2020 +0100
  62. d73c1ba el3_runtime: Update context save and restore routines for EL1 and EL2 by Manish V Badarkhe · Tue Jul 28 07:12:56 2020 +0100
  63. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  64. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  65. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  66. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  67. 0c16abd Fix exception in save/restore of EL2 registers. by Max Shvetsov · Wed May 13 18:15:39 2020 +0100
  68. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  69. 1962891 context: TPIDR_EL2 register not saved/restored by Olivier Deprez · Fri Mar 20 14:22:05 2020 +0100
  70. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  71. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  72. 5b21082 Merge "Coverity: remove unnecessary header file includes" into integration by Mark Dykes · Tue Feb 04 17:15:57 2020 +0000
  73. 39ca69d Merge changes from topic "mp/separate_nobits" into integration by Sandrine Bailleux · Tue Feb 04 16:37:09 2020 +0000
  74. 87675d4 Coverity: remove unnecessary header file includes by Zelalem · Mon Feb 03 14:56:42 2020 -0600
  75. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · Fri Jan 24 13:30:28 2020 +0000
  76. f4e6ea6 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · Mon Jan 27 15:32:15 2020 -0600
  77. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  78. fa01598 aarch64: Fix stack pointer maintenance on EA handling path by Jan Dabros · Mon Dec 02 13:30:03 2019 +0100
  79. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  80. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  81. 14e508b Merge "AArch32: Disable Secure Cycle Counter" into integration by Soby Mathew · Fri Sep 27 10:55:15 2019 +0000
  82. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  83. 05e030e Fix MTE support from causing unused variable warnings by Justin Chadwell · Fri Sep 20 09:13:14 2019 +0100
  84. c3a1836 Merge changes from topic "db/unsigned_long" into integration by Sandrine Bailleux · Wed Sep 18 14:30:09 2019 +0000
  85. b0f2602 SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64 by Deepika Bhavnani · Tue Sep 03 21:08:51 2019 +0300
  86. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  87. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  88. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  89. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  90. b5cf10f Fix restoring APIBKey registers by Sandrine Bailleux · Thu Mar 14 11:38:01 2019 +0100
  91. 899146b Merge pull request #1848 from antonio-nino-diaz-arm/an/docs by Antonio Niño Díaz · Fri Mar 01 09:16:58 2019 +0000
  92. 56b68ad Minor changes to documentation and comments by Antonio Nino Diaz · Thu Feb 28 13:35:21 2019 +0000
  93. 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · Thu Feb 28 10:19:24 2019 +0000
  94. 25cda67 Add support for pointer authentication by Antonio Nino Diaz · Tue Feb 19 11:53:51 2019 +0000
  95. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  96. 13adfb1 Cleanup context handling library by Antonio Nino Diaz · Wed Jan 30 20:41:31 2019 +0000
  97. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · Wed Feb 20 12:11:41 2019 +0000
  98. 1fbc97b Correct typographical errors by Paul Beesley · Fri Jan 11 18:26:51 2019 +0000
  99. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  100. 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · Wed Oct 31 15:25:35 2018 +0000