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git01.mediatek.com / filogic / atf / 5e6ba912478f2c20f9e4e04046d63d95deb0ed3c / lib / el3_runtime
  1. b2458b2 Merge "build(changelog): add new scope for Performance Monitor Extensions" into integration by Manish V Badarkhe · Mon Oct 10 11:49:13 2022 +0200
  2. 4ec78ad build(changelog): add new scope for Performance Monitor Extensions by Jayanth Dodderi Chidanand · Mon Sep 19 23:32:08 2022 +0100
  3. 7c6fcb4 fix(ras): trap "RAS error record" accesses only for NS by Manish Pandey · Tue Sep 27 14:30:34 2022 +0100
  4. 785e66c refactor(libc): clean up dependencies in libc by Claus Pedersen · Mon Sep 12 22:42:58 2022 +0000
  5. cc238bb fix(context mgmt): remove explicit ICC_SRE_EL2 register read by Varun Wadekar · Tue Sep 13 12:38:47 2022 +0100
  6. 42305f2 feat(rng-trap): add EL3 support for FEAT_RNG_TRAP by Juan Pablo Conde · Tue Jul 12 16:40:29 2022 -0400
  7. 5362beb refactor(context mgmt): refactor EL2 context save and restore functions by Zelalem Aweke · Mon Apr 04 17:42:48 2022 -0500
  8. 2012600 refactor(context mgmt): refactor initialization of EL1 context registers by Zelalem Aweke · Fri Apr 08 16:48:05 2022 -0500
  9. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · Tue May 10 15:55:05 2022 +0200
  10. e43ba98 Merge "fix(cm): add barrier before el3 ns exit" into integration by Olivier Deprez · Tue May 10 14:15:51 2022 +0200
  11. e4793dd fix(cm): add barrier before el3 ns exit by Olivier Deprez · Mon May 09 17:34:02 2022 +0200
  12. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · Fri Jan 28 17:06:20 2022 -0600
  13. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
  14. 4b5489c refactor(twed): improve TWED enablement in EL-3 by Jayanth Dodderi Chidanand · Mon Mar 28 15:28:55 2022 +0100
  15. f92c0cb refactor(context mgmt): add cm_prepare_el3_exit_ns function by Zelalem Aweke · Mon Jan 31 16:59:42 2022 -0600
  16. 4240111 refactor(context mgmt): refactor the cm_setup_context function by Zelalem Aweke · Wed Jan 05 17:12:24 2022 -0600
  17. bd17eae refactor(context mgmt): remove registers accessible only from secure state from EL2 context by Zelalem Aweke · Wed Nov 03 13:31:53 2021 -0500
  18. 72b69b8 refactor(el3-runtime): replace ARM_ARCH_AT_LEAST macro with FEAT flags by Jayanth Dodderi Chidanand · Wed Jan 26 17:14:43 2022 +0000
  19. 928747f fix(el3-runtime): set unset pstate bits to default by Daniel Boulby · Tue May 25 18:09:34 2021 +0100
  20. 95fb1aa refactor(el3-runtime): add prepare_el3_entry func by Daniel Boulby · Wed Jan 19 11:20:05 2022 +0000
  21. 13ae0f4 fix(amu): fault handling on EL2 context switch by Jayanth Dodderi Chidanand · Thu Nov 25 14:59:30 2021 +0000
  22. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  23. b6301e6 feat(rme): add context management changes for FEAT_RME by Zelalem Aweke · Fri Jul 09 17:54:30 2021 -0500
  24. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  25. 51a9711 feat(trf): enable trace filter control register access from lower NS EL by Manish V Badarkhe · Thu Jul 08 09:33:18 2021 +0100
  26. f356f7e feat(sys_reg_trace): enable trace system registers access from lower NS ELs by Manish V Badarkhe · Tue Jun 29 11:44:20 2021 +0100
  27. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  28. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  29. cac7d16 fix(el3_runtime): fix SVE and AMU extension enablement flags by Arunachalam Ganapathy · Thu Jul 08 09:35:57 2021 +0100
  30. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  31. ba3a098 Merge "fix(security): Set MDCR_EL3.MCCD bit" into integration by Mark Dykes · Tue Jun 08 18:26:52 2021 +0200
  32. 7d0299f fix: random typos in tf-a code base by Olivier Deprez · Tue May 25 12:06:03 2021 +0200
  33. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  34. cf784f7 Fix: Remove save/restore of EL2 timer registers by Max Shvetsov · Wed Mar 31 19:00:38 2021 +0100
  35. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  36. fba2572 Fix exception handlers in BL31: Use DSB to synchronize pending EA by Madhukar Pappireddy · Fri Jul 24 03:27:12 2020 -0500
  37. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  38. 04b7e43 lib: el3_runtime: Fix SPE system registers in el2_sysregs_context by Arunachalam Ganapathy · Fri Oct 09 14:51:41 2020 +0100
  39. dd3ec7e lib: el3_runtime: Conditionally save/restore EL2 NEVE registers by Arunachalam Ganapathy · Thu May 28 11:57:09 2020 +0100
  40. dca591b lib: el3_runtime: Fix aarch32 system registers in el2_sysregs_context by Arunachalam Ganapathy · Tue May 26 11:32:35 2020 +0100
  41. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  42. 4283ed1 SPM: Change condition on saving/restoring EL2 registers by Ruari Phipps · Tue Jul 28 11:26:29 2020 +0100
  43. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  44. 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · Tue Jul 28 07:22:30 2020 +0100
  45. d73c1ba el3_runtime: Update context save and restore routines for EL1 and EL2 by Manish V Badarkhe · Tue Jul 28 07:12:56 2020 +0100
  46. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  47. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  48. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  49. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  50. 0c16abd Fix exception in save/restore of EL2 registers. by Max Shvetsov · Wed May 13 18:15:39 2020 +0100
  51. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  52. 1962891 context: TPIDR_EL2 register not saved/restored by Olivier Deprez · Fri Mar 20 14:22:05 2020 +0100
  53. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  54. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  55. 5b21082 Merge "Coverity: remove unnecessary header file includes" into integration by Mark Dykes · Tue Feb 04 17:15:57 2020 +0000
  56. 39ca69d Merge changes from topic "mp/separate_nobits" into integration by Sandrine Bailleux · Tue Feb 04 16:37:09 2020 +0000
  57. 87675d4 Coverity: remove unnecessary header file includes by Zelalem · Mon Feb 03 14:56:42 2020 -0600
  58. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · Fri Jan 24 13:30:28 2020 +0000
  59. f4e6ea6 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · Mon Jan 27 15:32:15 2020 -0600
  60. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  61. fa01598 aarch64: Fix stack pointer maintenance on EA handling path by Jan Dabros · Mon Dec 02 13:30:03 2019 +0100
  62. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  63. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  64. 14e508b Merge "AArch32: Disable Secure Cycle Counter" into integration by Soby Mathew · Fri Sep 27 10:55:15 2019 +0000
  65. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  66. 05e030e Fix MTE support from causing unused variable warnings by Justin Chadwell · Fri Sep 20 09:13:14 2019 +0100
  67. c3a1836 Merge changes from topic "db/unsigned_long" into integration by Sandrine Bailleux · Wed Sep 18 14:30:09 2019 +0000
  68. b0f2602 SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64 by Deepika Bhavnani · Tue Sep 03 21:08:51 2019 +0300
  69. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  70. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  71. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  72. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  73. b5cf10f Fix restoring APIBKey registers by Sandrine Bailleux · Thu Mar 14 11:38:01 2019 +0100
  74. 899146b Merge pull request #1848 from antonio-nino-diaz-arm/an/docs by Antonio Niño Díaz · Fri Mar 01 09:16:58 2019 +0000
  75. 56b68ad Minor changes to documentation and comments by Antonio Nino Diaz · Thu Feb 28 13:35:21 2019 +0000
  76. 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · Thu Feb 28 10:19:24 2019 +0000
  77. 25cda67 Add support for pointer authentication by Antonio Nino Diaz · Tue Feb 19 11:53:51 2019 +0000
  78. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  79. 13adfb1 Cleanup context handling library by Antonio Nino Diaz · Wed Jan 30 20:41:31 2019 +0000
  80. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · Wed Feb 20 12:11:41 2019 +0000
  81. 1fbc97b Correct typographical errors by Paul Beesley · Fri Jan 11 18:26:51 2019 +0000
  82. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  83. 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · Wed Oct 31 15:25:35 2018 +0000
  84. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · Thu Oct 25 16:52:26 2018 +0100
  85. cbad661 AArch64: Enable lower ELs to use pointer authentication by Jeenu Viswambharan · Wed Aug 15 14:29:29 2018 +0100
  86. 5753e49 Mark BL31 initialization functions by Daniel Boulby · Thu Sep 20 14:12:46 2018 +0100
  87. c51a2ec context_mgmt: Fix HANDLE_EA_EL3_FIRST implementation by Julius Werner · Tue Aug 28 14:45:43 2018 -0700
  88. 2da918c AArch64: Enable MPAM for lower ELs by Jeenu Viswambharan · Tue Jul 31 16:13:33 2018 +0100
  89. fe5c421 Merge pull request #1392 from dp-arm/dp/cve_2018_3639 by Dimitris Papastamos · Tue May 29 09:28:05 2018 +0100
  90. 28dce9e context_mgmt: Make cm_init_context_common public by Antonio Nino Diaz · Tue May 22 10:09:10 2018 +0100
  91. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · Wed May 16 11:36:14 2018 +0100
  92. b2f1003 Merge pull request #1376 from vwadekar/cm-init-actlr-el1 by Dimitris Papastamos · Tue May 15 18:40:46 2018 +0100
  93. b6dd0b3 lib: el3_runtime: initialise actlr_el1 to hardware defaults by Varun Wadekar · Tue May 08 10:52:36 2018 -0700
  94. f00da74 RAS: Add fault injection support by Jeenu Viswambharan · Fri Dec 08 12:13:51 2017 +0000
  95. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · Wed Apr 04 16:07:11 2018 +0100
  96. 23d05a8 AArch64: Refactor GP register restore to separate function by Jeenu Viswambharan · Wed Nov 29 16:59:34 2017 +0000
  97. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  98. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  99. dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · Tue Oct 17 14:03:14 2017 +0100
  100. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100