1. d69722c Cortex-A73: Implement workaround for errata 852427 by Louis Mayencourt · 6 years ago
  2. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 6 years ago
  3. aa2c029 Cortex-A57: Implement workaround for erratum 817169 by Ambroise Vincent · 6 years ago
  4. 1b0db76 Cortex-A57: Implement workaround for erratum 814670 by Ambroise Vincent · 6 years ago
  5. a1d6446 Cortex-A55: Implement workaround for erratum 903758 by Ambroise Vincent · 6 years ago
  6. dd961f7 Cortex-A55: Implement workaround for erratum 846532 by Ambroise Vincent · 6 years ago
  7. 6a77f05 Cortex-A55: Implement workaround for erratum 798797 by Ambroise Vincent · 6 years ago
  8. 6f31960 Cortex-A55: Implement workaround for erratum 778703 by Ambroise Vincent · 6 years ago
  9. 7927fa0 Cortex-A55: Implement workaround for erratum 768277 by Ambroise Vincent · 6 years ago
  10. 4d034c5 Tegra: Support for scatterfile for the BL31 image by Varun Wadekar · 6 years ago
  11. 59fa218 Add workaround for errata 1073348 for Cortex-A76 by Louis Mayencourt · 6 years ago
  12. adda9d4 Add workaround for errata 1220197 for Cortex-A76 by Louis Mayencourt · 6 years ago
  13. 0992447 Add workaround for errata 1130799 for Cortex-A76 by Louis Mayencourt · 6 years ago
  14. 8d86870 Add workaround for errata 790748 for Cortex-A75 by Louis Mayencourt · 6 years ago
  15. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · 6 years ago
  16. 4405de6 Add workaround for errata 855423 of Cortex-A73 by Louis Mayencourt · 6 years ago
  17. 16e6d9f Rename Cortex-Helios to Neoverse E1 by John Tsichritzis · 6 years ago
  18. 3d417ac Rename Cortex-Helios filenames to Neoverse E1 by John Tsichritzis · 6 years ago
  19. 56369c1 Rename Cortex-Ares to Neoverse N1 by John Tsichritzis · 6 years ago
  20. 97ff6d0 Rename Cortex-Ares filenames to Neoverse N1 by John Tsichritzis · 6 years ago
  21. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  22. aa00aff AArch64: Use SSBS for CVE_2018_3639 mitigation by Jeenu Viswambharan · 6 years ago
  23. 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 6 years ago
  24. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · 6 years ago
  25. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · 6 years ago
  26. 7c461d7 ti: k3: common: Do not disable cache on TI K3 core powerdown by Andrew F. Davis · 6 years ago
  27. 5e7e4a7 Fix the Cortex-ares errata reporting function name by Soby Mathew · 6 years ago
  28. cd38e6e cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · 6 years ago
  29. 2b91412 cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · 6 years ago
  30. 007a206 denver: use plat_my_core_pos() to get core position by Varun Wadekar · 7 years ago
  31. 13110b4 DSU erratum 936184 workaround: bug fix by John Tsichritzis · 6 years ago
  32. 268e699 Merge pull request #1388 from vwadekar/report-cve-2017-5715 by Dimitris Papastamos · 6 years ago
  33. bc242fa cpus: denver: report CVE_2017_5715 mitigation to higher layers by Varun Wadekar · 6 years ago
  34. 4daa1de DSU erratum 936184 workaround by John Tsichritzis · 6 years ago
  35. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · 7 years ago
  36. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · 7 years ago
  37. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · 7 years ago
  38. bb0aa39 cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 6 years ago
  39. 14f7005 Fix MISRA Rule 5.7 Part 1 by Daniel Boulby · 7 years ago
  40. 8c18f6a Merge pull request #1397 from dp-arm/dp/cortex-a76 by Dimitris Papastamos · 6 years ago
  41. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 7 years ago
  42. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 7 years ago
  43. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · 7 years ago
  44. ea84d6b Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 7 years ago
  45. 6694633 Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32 by Dimitris Papastamos · 6 years ago
  46. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  47. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  48. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  49. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  50. e34bd09 Workaround for CVE-2017-5715 on NVIDIA Denver CPUs by Varun Wadekar · 7 years ago
  51. 6e1796e Check presence of fix for errata 835769 in Cortex-A53 by Jonathan Wright · 7 years ago
  52. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  53. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  54. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  55. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 7 years ago
  56. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · 7 years ago
  57. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · 7 years ago
  58. d1e1930 Fixup AArch32 errata printing framework by Soby Mathew · 7 years ago
  59. 8ca3144 Merge pull request #1253 from dp-arm/dp/amu32 by davidcunado-arm · 7 years ago
  60. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · 7 years ago
  61. 2880363 Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75 by Dimitris Papastamos · 7 years ago
  62. b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · 7 years ago
  63. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 7 years ago
  64. 471fb9b Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-reset-fix by davidcunado-arm · 7 years ago
  65. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 7 years ago
  66. e37c029 lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode by Manoj Kumar · 7 years ago
  67. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  68. 858bd61 Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  69. 84e02dc Change the default errata format string by Dimitris Papastamos · 7 years ago
  70. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  71. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · 7 years ago
  72. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 7 years ago
  73. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · 7 years ago
  74. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · 7 years ago
  75. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  76. 4c24bb7 Merge pull request #1168 from matt2048/master by davidcunado-arm · 7 years ago
  77. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  78. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  79. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  80. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  81. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  82. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  83. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  84. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  85. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  86. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  87. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  88. 9930501 Fix order of #includes by Isla Mitchell · 7 years ago
  89. d0c8273 Introduce TF_LDFLAGS by Douglas Raillard · 7 years ago
  90. 505f467 Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53 by danh-arm · 7 years ago
  91. 8a354f1 Resolve signed-unsigned comparison issues by David Cunado · 7 years ago
  92. d56fb04 Apply workarounds for A53 Cat A Errata 835769 and 843419 by Douglas Raillard · 7 years ago
  93. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  94. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  95. 370542e aarch32: Implement cpu_rev_var_hs() by Dimitris Papastamos · 7 years ago
  96. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  97. 66231d1 Tegra: enable 'signed-comparison' compilation warning/errors by Varun Wadekar · 7 years ago
  98. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  99. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  100. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago