Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 3bcf3c8e94951e4a4c4bed26ba11a41aed769a36 / lib
  1. 5bd5ae9 cpus: denver: skip DCO enable/disable for recent SKUs by Varun Wadekar · Wed Aug 05 23:10:40 2020 -0700
  2. 96e081d lib: cpus: denver: add MIDR PN9 variant by Hemant Nigam · Tue Dec 17 14:21:38 2019 -0800
  3. 3bdb40b cpus: denver: introduce macro to declare cpu_ops by Varun Wadekar · Fri Aug 28 14:00:15 2020 -0700
  4. c58a13e Add support for hexadecimal and pointer format specifiers to snprintf() by Javier Almansa Sobrino · Fri Aug 21 17:32:03 2020 +0100
  5. 718c876 lib: cpus: sanity check pointers before use by Varun Wadekar · Tue Oct 01 09:34:10 2019 -0700
  6. 8db11fd Merge "Revert "libc/memset: Implement function in assembler"" into integration by Mark Dykes · Fri Aug 21 19:44:05 2020 +0000
  7. ad5ab07 Revert "libc/memset: Implement function in assembler" by Mark Dykes · Wed Aug 19 19:11:33 2020 +0000
  8. e0d3382 Merge changes from topic "at_errata_fix" into integration by Olivier Deprez · Thu Aug 20 14:40:06 2020 +0000
  9. 3ad26ae libc/memset: Implement function in assembler by Alexei Fedorov · Sun Aug 16 16:01:13 2020 +0100
  10. 4283ed1 SPM: Change condition on saving/restoring EL2 registers by Ruari Phipps · Tue Jul 28 11:26:29 2020 +0100
  11. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  12. 7672edf lib/cpus: Report AT speculative erratum workaround by Manish V Badarkhe · Mon Aug 03 18:43:14 2020 +0100
  13. 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · Tue Jul 28 07:22:30 2020 +0100
  14. d73c1ba el3_runtime: Update context save and restore routines for EL1 and EL2 by Manish V Badarkhe · Tue Jul 28 07:12:56 2020 +0100
  15. 30d20bb Merge "lib: cpus: denver: add some MIDR values" into integration by Varun Wadekar · Fri Aug 14 20:32:44 2020 +0000
  16. 46a92ca Merge changes from topic "sp_dual_signing" into integration by Sandrine Bailleux · Fri Aug 14 11:44:58 2020 +0000
  17. a722574 Merge "lib: cpus: denver: mark exception vectors as private" into integration by Mark Dykes · Thu Aug 13 21:09:09 2020 +0000
  18. a9c4521 TF-A AMU: remove AMU enable info print by Olivier Deprez · Thu Aug 13 12:55:54 2020 +0200
  19. 3f0d7af cert_create: add Platform owned secure partitions support by Manish Pandey · Fri Jul 24 16:43:54 2020 +0100
  20. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  21. 28a6df4 Merge "MISRA cleanup in mem_region and semihosting files" into integration by Madhukar Pappireddy · Sun Aug 09 17:21:48 2020 +0000
  22. 5f68fa7 lib: cpus: denver: add some MIDR values by Alex Van Brunt · Tue Jul 23 10:00:42 2019 -0700
  23. 2c92b41 lib: cpus: denver: mark exception vectors as private by Varun Wadekar · Thu Jun 13 11:55:05 2019 -0700
  24. d4cb853 MISRA cleanup in mem_region and semihosting files by johpow01 · Thu Jul 30 17:11:03 2020 -0500
  25. 0a5ff01 Merge "Use abspath to dereference $BUILD_BASE" into integration by Alexei Fedorov · Wed Aug 05 16:31:27 2020 +0000
  26. 388248a Use abspath to dereference $BUILD_BASE by Grant Likely · Thu Jul 30 08:50:10 2020 +0100
  27. df834a9 Merge "TF-A Aarch32: optimise memcpy4()" into integration by Manish Pandey · Mon Aug 03 22:24:29 2020 +0000
  28. dc88b58 Aarch32 xlat_tables lib: Fix MISRA-2012 defects by Alexei Fedorov · Tue Jul 28 12:26:36 2020 +0100
  29. 3074fa5 Merge "Revert workaround for Neoverse N1 erratum 1800710" into integration by Lauren Wehrmeister · Thu Jul 23 20:02:15 2020 +0000
  30. eb8d429 Revert workaround for Neoverse N1 erratum 1800710 by johpow01 · Thu Jul 23 13:05:45 2020 -0500
  31. 7a2090a TF-A Aarch32: optimise memcpy4() by Alexei Fedorov · Thu Jul 23 18:35:49 2020 +0100
  32. 6a91e59 lib/fconf: Update 'set_fw_config_info' function by Manish V Badarkhe · Wed Jul 15 05:08:37 2020 +0100
  33. a8be3bb lib/fconf: Update data type of config max size by Manish V Badarkhe · Wed Jul 15 04:27:57 2020 +0100
  34. 40e7d6c TF-A: Add support for Measured Boot driver to FCONF by Alexei Fedorov · Mon Jul 13 14:10:00 2020 +0100
  35. b7c045a Merge "Upgrade libfdt source files" into integration by Sandrine Bailleux · Wed Jul 08 06:54:39 2020 +0000
  36. ee4d02a Merge "Workaround for Neoverse N1 erratum 1800710" into integration by Lauren Wehrmeister · Wed Jul 01 16:57:11 2020 +0000
  37. 596fe0a Upgrade libfdt source files by Madhukar Pappireddy · Mon Jun 15 17:19:09 2020 -0500
  38. 8d0effa Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:06:52 2020 +0000
  39. 6d9b5ee Workaround for Neoverse N1 erratum 1800710 by johpow01 · Tue Jun 02 13:14:11 2020 -0500
  40. 68aedc7 Workaround for Cortex A77 erratum 1800714 by johpow01 · Wed Jun 03 15:23:31 2020 -0500
  41. 99a8e14 plat/arm: Load and populate fw_config and tb_fw_config by Manish V Badarkhe · Thu Jun 11 22:32:11 2020 +0100
  42. e069f8a fconf: Handle error from fconf_load_config by Manish V Badarkhe · Thu Jun 11 22:25:53 2020 +0100
  43. bb533c7 fconf: Allow fconf to load additional firmware configuration by Manish V Badarkhe · Thu Jun 11 22:17:30 2020 +0100
  44. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  45. e9207d6 fiptool: Add fw_config in FIP by Manish V Badarkhe · Thu Jun 11 21:02:03 2020 +0100
  46. 64616a5 plat/arm: Rentroduce tb_fw_config device tree by Manish V Badarkhe · Sun May 31 08:53:40 2020 +0100
  47. 5c9ed08 Workaround for Cortex A76 erratum 1800710 by johpow01 · Tue Jun 02 15:02:28 2020 -0500
  48. 9603f98 Workaround for Cortex A76 erratum 1791580 by johpow01 · Fri May 29 14:17:38 2020 -0500
  49. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  50. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  51. 88d0f06 cpus: denver: disable cycle counter when event counting is prohibited by Varun Wadekar · Sun May 24 16:26:22 2020 -0700
  52. 0a65884 cert_create: add SiP owned secure partitions support by Manish Pandey · Fri May 22 12:27:28 2020 +0100
  53. 398c2c7 Merge "Rename Cortex-Hercules to Cortex-A78" into integration by Madhukar Pappireddy · Wed Jun 03 19:26:34 2020 +0000
  54. 83d6461 Merge "Rename Cortex Hercules Files to Cortex A78" into integration by Madhukar Pappireddy · Wed Jun 03 19:26:08 2020 +0000
  55. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  56. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  57. 3571fb9 Rename Cortex-Hercules to Cortex-A78 by Jimmy Brisson · Mon Jun 01 10:18:22 2020 -0500
  58. 7ec175e Rename Cortex Hercules Files to Cortex A78 by Jimmy Brisson · Mon Jun 01 16:49:34 2020 -0500
  59. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  60. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  61. 0c16abd Fix exception in save/restore of EL2 registers. by Max Shvetsov · Wed May 13 18:15:39 2020 +0100
  62. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  63. 96109de Merge changes I85eb75cf,Ic6d9f927 into integration by Sandrine Bailleux · Tue May 05 12:01:48 2020 +0000
  64. b26fafa fconf: Update dyn_config compatible string by Louis Mayencourt · Mon Apr 20 14:17:21 2020 +0100
  65. fe5bdf5 fdt/wrappers: Replace fdtw_read_cells() implementation by Andre Przywara · Thu Mar 26 11:22:37 2020 +0000
  66. 8acc493 coreboot: Add memory range parsing by Julius Werner · Thu Mar 26 18:06:21 2020 -0700
  67. 019b4f8 locks: bakery: use is_dcache_enabled() helper by Masahiro Yamada · Thu Apr 02 15:35:19 2020 +0900
  68. 03fa063 Merge "xlat_tables_v2: use get_current_el_maybe_constant() in is_dcache_enabled()" into integration by Mark Dykes · Fri Apr 03 21:41:05 2020 +0000
  69. 316b73b xlat lib v2: Add support to pass shareability attribute for normal memory region by Pramod Kumar · Wed Feb 19 10:39:10 2020 +0530
  70. 0a3c95b xlat_tables_v2: use get_current_el_maybe_constant() in is_dcache_enabled() by Masahiro Yamada · Thu Apr 02 16:20:21 2020 +0900
  71. f5f203a xlat_tables_v2: fix assembler warning of PLAT_RO_XLAT_TABLES by Masahiro Yamada · Thu Mar 26 13:18:48 2020 +0900
  72. c1864d9 Merge "xlat_tables_v2: add enable_mmu()" into integration by Mark Dykes · Tue Mar 31 19:56:31 2020 +0000
  73. 3176571 fconf: exclude fconf_dyn_cfg_getter.c from BL1_SOURCES by Masahiro Yamada · Tue Mar 31 14:21:59 2020 +0900
  74. fb10bfd xlat_tables_v2: add enable_mmu() by Masahiro Yamada · Thu Mar 26 13:18:48 2020 +0900
  75. 5d60f2a fconf: notify if fw_config dt is not used by Manish Pandey · Thu Mar 26 21:46:53 2020 +0000
  76. 329fbf7 Merge "fconf: Clean Arm IO" into integration by Mark Dykes · Tue Mar 24 18:14:24 2020 +0000
  77. 1962891 context: TPIDR_EL2 register not saved/restored by Olivier Deprez · Fri Mar 20 14:22:05 2020 +0100
  78. 6b232d9 fconf: Clean Arm IO by Louis Mayencourt · Fri Feb 28 16:57:30 2020 +0000
  79. e8b6b80 Merge changes from topic "mp/enhanced_pal_hw" into integration by Mark Dykes · Thu Mar 12 15:54:28 2020 +0000
  80. ddd2224 Merge "locks: bakery: add a DMB to the 'read_cache_op' macro" into integration by Soby Mathew · Thu Mar 12 13:23:00 2020 +0000
  81. 8151969 fconf: enhancements to firmware configuration framework by Madhukar Pappireddy · Fri Dec 06 15:46:42 2019 -0600
  82. 0db2375 xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE} by Masahiro Yamada · Fri Mar 06 19:21:26 2020 +0900
  83. 892fff9 cpus: denver: fixup register used to store return address by Kalyani Chidambaram · Mon Oct 08 17:01:01 2018 -0700
  84. d3ad4c7 locks: bakery: add a DMB to the 'read_cache_op' macro by Varun Wadekar · Fri Jun 29 13:34:51 2018 -0700
  85. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  86. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  87. 2fb0b10 Merge changes from topic "console_t_cleanup" into integration by Mark Dykes · Tue Feb 25 23:38:46 2020 +0000
  88. c2f8d6d coreboot: Use generic base address by Andre Przywara · Sat Jan 25 01:07:19 2020 +0000
  89. e5a6fef Read-only xlat tables for BL31 memory by Petre-Ionut Tudor · Thu Nov 07 15:18:03 2019 +0000
  90. 0fc5403 Merge "Add Matterhorn CPU lib" into integration by joanna.farley · Fri Feb 21 17:51:10 2020 +0000
  91. c9a45ed Merge "Add CPULib for Klein Core" into integration by joanna.farley · Fri Feb 21 17:50:01 2020 +0000
  92. 5ee3abc cpus: higher performance non-cacheable load forwarding by Varun Wadekar · Tue Jun 12 16:49:12 2018 -0700
  93. 91d8061 coverity: fix MISRA violations by Zelalem · Wed Feb 12 10:37:03 2020 -0600
  94. d904ac1 Add Matterhorn CPU lib by Jimmy Brisson · Wed Jan 08 13:52:51 2020 -0600
  95. 2463f9d Add CPULib for Klein Core by Jimmy Brisson · Mon Dec 09 14:02:22 2019 -0600
  96. 94eb27f Merge changes from topic "lm/fconf" into integration by Sandrine Bailleux · Tue Feb 11 16:15:45 2020 +0000
  97. 5b9055f fconf: Add mbedtls shared heap as property by Louis Mayencourt · Tue Oct 01 10:45:14 2019 +0100
  98. 4da9b31 fconf: Add TBBR disable_authentication property by Louis Mayencourt · Mon Sep 30 10:57:24 2019 +0100
  99. 6d2b573 fconf: Add dynamic config DTBs info as property by Louis Mayencourt · Tue Dec 17 13:17:25 2019 +0000
  100. 81bd916 fconf: Populate properties from dtb during bl2 setup by Louis Mayencourt · Thu Oct 17 15:14:25 2019 +0100