Log - 37f8af2f3ccce55810116ea5b542540ec9956767 - filogic/atf

649eb24 Tegra194: memctrl: lock mc stream id security config by Pritesh Raithatha · 6 years ago
b1914ae Tegra194: memctrl: enable mc sid OVERRIDE for PCIE0R1 by Pritesh Raithatha · 7 years ago
1654e1c Tegra194: memctrl: set reorder depth limit for PCIE blocks by Puneet Saxena · 7 years ago
e0dd683 Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU by Pritesh Raithatha · 7 years ago
c2f067b Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT by Pritesh Raithatha · 7 years ago
5b526df Tegra194: memctrl: update mss reprogramming as HW PROD settings by Puneet Saxena · 7 years ago
919e0e2 Tegra194: memctrl: Disable PVARDC coalescer by Arto Merilainen · 7 years ago
0273655 Tegra194: memctrl: force seswr/rd transactions as passsthru & coherent by Puneet Saxena · 7 years ago
3d8d2ab Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent by Krishna Reddy · 7 years ago
a1673b3 Tegra194: memctrl: fix bug in client order id reg value generation by Krishna Reddy · 7 years ago
45ea689 Tegra194: memctrl: enable mc coalescer by Pritesh Raithatha · 7 years ago
b2b4305 Tegra194: memctrl: fix logic to check TZDRAM config register access by Steven Kao · 7 years ago
ee93ed1 Tegra194: memctrl: platform handler for TZDRAM setup by Steven Kao · 7 years ago
0d42411 Tegra194: memctrl: override SE client as coherent by Puneet Saxena · 7 years ago
4607f17 Tegra194: rename secure scratch register macros by Steven Kao · 7 years ago
8bf6d4e Tegra194: fix defects flagged by MISRA scan by Anthony Zhou · 7 years ago
128f46a Tegra194: memctrl: platform handlers to reprogram MSS by Varun Wadekar · 5 years ago
8162109 Tegra194: program stream ids for XUSB by Ajay Gupta · 7 years ago
0075990 Tegra194: platform support for memctrl/smmu drivers by Varun Wadekar · 7 years ago