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filogic
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atf
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2bb78d3ab2ae07aa94a6eaa6587861eb7da538c3
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include
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lib
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cpus
efb1f33
Check presence of fix for errata 843419 in Cortex-A53
by Jonathan Wright
· Wed Mar 28 15:52:03 2018 +0100
914757c
Fixup `SMCCC_ARCH_FEATURES` semantics
by Dimitris Papastamos
· Mon Mar 12 14:47:09 2018 +0000
780cc95
Use PFR0 to identify need for mitigation of CVE-2017-5715
by Dimitris Papastamos
· Mon Mar 12 13:27:02 2018 +0000
b8d8145
Merge pull request #1282 from robertovargas-arm/misra-changes
by davidcunado-arm
· Wed Feb 28 18:53:30 2018 +0000
0571270
Fix MISRA rule 8.4 in common code
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
864364a
MISRA fixes for Cortex A75 AMU implementation
by Dimitris Papastamos
· Tue Feb 27 10:55:39 2018 +0000
1be747f
Refactor AMU support for Cortex A75
by Dimitris Papastamos
· Wed Feb 14 10:28:36 2018 +0000
0b00f8a
Factor out CPU AMU helpers
by Dimitris Papastamos
· Wed Feb 14 10:00:06 2018 +0000
04285cf
Merge pull request #1228 from dp-arm/dp/cve_2017_5715
by davidcunado-arm
· Thu Jan 25 00:06:50 2018 +0000
b5d1f8e
Merge pull request #1200 from robertovargas-arm/bl2-el3
by davidcunado-arm
· Fri Jan 19 13:40:12 2018 +0000
8ca0af2
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· Wed Jan 03 10:48:59 2018 +0000
e0e9946
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· Mon Oct 30 14:43:43 2017 +0000
d7e2e9e
Add hooks to save/restore AMU context for Cortex A75
by Dimitris Papastamos
· Mon Dec 11 11:45:35 2017 +0000
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· Mon Oct 16 11:40:10 2017 +0100
09d26a6
ARMv7: introduce Cortex-A12
by Etienne Carriere
· Sun Nov 05 22:56:50 2017 +0100
010dd1f
ARMv7: introduce Cortex-A17
by Etienne Carriere
· Sun Nov 05 22:56:41 2017 +0100
f2f7b91
ARMv7: introduce Cortex-A7
by Etienne Carriere
· Sun Nov 05 22:56:34 2017 +0100
37f8cdc
ARMv7: introduce Cortex-A5
by Etienne Carriere
· Sun Nov 05 22:56:26 2017 +0100
a1249e0
ARMv7: introduce Cortex-A9
by Etienne Carriere
· Sun Nov 05 22:56:19 2017 +0100
4ece755
ARMv7: introduce Cortex-A15
by Etienne Carriere
· Sun Nov 05 22:56:10 2017 +0100
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· Wed Aug 02 18:33:41 2017 +0100
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· Wed Aug 02 16:35:04 2017 +0100
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· Wed Aug 09 16:42:40 2017 +0100
b83e42b
CPU: Make shifted constants unsigned
by Eleanor Bonnici
· Wed Aug 09 10:36:08 2017 +0100
ac838c5
aarch32: Fix L2CTRL definition for Cortex A57 and A72
by Dimitris Papastamos
· Tue Jun 13 12:33:39 2017 +0100
9c47a5a
aarch32: Implement errata workarounds for Cortex A53
by Dimitris Papastamos
· Mon Jun 05 13:37:25 2017 +0100
c6a11f6
include: add U()/ULL() macros for constants
by Varun Wadekar
· Thu May 25 18:04:48 2017 -0700
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· Mon Jun 05 14:54:46 2017 -0700
805c2c7
Add support for Cortex-A75 and Cortex-A55 CPUs
by David Wang
· Wed Nov 09 16:29:02 2016 +0000
9326b90
Cortex-A53: add some bit definitions
by Haojian Zhuang
· Wed May 24 08:48:57 2017 +0800
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
7d99b6c
Merge branch 'integration' into tf_issue_461
by Scott Branden
· Sat Apr 29 08:36:12 2017 -0700
bf404c0
Move defines in utils.h to utils_def.h to fix shared header compile issues
by Scott Branden
· Mon Apr 10 11:45:52 2017 -0700
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· Thu Nov 10 16:17:51 2016 +0000
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· Thu Oct 06 16:54:53 2016 +0100
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· Thu May 12 13:43:33 2016 -0700
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· Mon Feb 22 11:09:41 2016 -0800
3c337a6
cpus: Add support for all Denver variants
by Varun Wadekar
· Thu Sep 03 17:15:06 2015 +0530
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· Sun Dec 25 23:36:24 2016 +0900
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· Fri Nov 18 12:58:28 2016 +0000
a4c219a
AArch32: Add support for ARM Cortex-A32 MPCore Processor
by Yatharth Kochar
· Tue Jul 12 15:47:03 2016 +0100
f528faf
AArch32: Common changes needed for BL1/BL2
by Yatharth Kochar
· Tue Jun 28 16:58:26 2016 +0100
748be1d
AArch32: Add support in TF libraries
by Soby Mathew
· Thu May 05 14:10:46 2016 +0100
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· Fri Jul 01 12:52:41 2016 +0530
63af687
Add support for ARM Cortex-A73 MPCore Processor
by Yatharth Kochar
· Tue Feb 09 12:00:03 2016 +0000
143ef1a
Add support for Cortex-A57 erratum 833471 workaround
by Sandrine Bailleux
· Thu Apr 21 11:10:52 2016 +0100
adcbd55
Add support for Cortex-A57 erratum 826977 workaround
by Sandrine Bailleux
· Thu Apr 14 14:24:13 2016 +0100
48cbe85
Add support for Cortex-A57 erratum 829520 workaround
by Sandrine Bailleux
· Thu Apr 14 14:18:07 2016 +0100
c11116f
Add support for Cortex-A57 erratum 828024 workaround
by Sandrine Bailleux
· Thu Apr 14 14:04:48 2016 +0100
a7e0c53
Add support for Cortex-A57 erratum 826974 workaround
by Sandrine Bailleux
· Thu Apr 14 13:32:31 2016 +0100
d481759
Disable non-temporal hint on Cortex-A53/57
by Sandrine Bailleux
· Wed Jan 13 14:57:38 2016 +0000
432aa77
Add support for ARM Cortex-A35 processor
by Sandrine Bailleux
· Thu Jan 07 16:52:49 2016 +0000
7d19941
Remove dashes from image names: 'BL3-x' --> 'BL3x'
by Juan Castillo
· Mon Dec 14 09:35:25 2015 +0000
29a7a03
Juno R2: Configure the correct L2 RAM latency values
by Sandrine Bailleux
· Wed Nov 18 11:59:35 2015 +0000
3ce4e88
Add macros for retention control in Cortex-A53/A57
by Varun Wadekar
· Fri Aug 21 15:52:51 2015 +0530
4fceaca
cortex_a53: Add A53 errata #826319, #836870
by developer
· Wed Jul 29 20:55:31 2015 +0800
28463b9
Add "Project Denver" CPU support
by Varun Wadekar
· Tue Jul 14 17:11:20 2015 +0530
ea59668
Add header guards to asm macro files
by Dan Handley
· Wed Apr 01 17:34:24 2015 +0100
c47e011
Add support for ARM Cortex-A72 processor
by Vikram Kanigiri
· Tue Feb 17 11:50:28 2015 +0000
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· Thu Nov 20 18:09:41 2014 +0000
798140d
Juno: Implement initial platform port
by Sandrine Bailleux
· Thu Jul 17 16:06:39 2014 +0100
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· Thu Aug 14 16:19:29 2014 +0100
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· Thu Aug 14 13:36:41 2014 +0100
8e2f287
Add CPU specific power management operations
by Soby Mathew
· Thu Aug 14 12:49:05 2014 +0100