Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 2bb78d3ab2ae07aa94a6eaa6587861eb7da538c3 / include / lib
  1. 497f357 Merge pull request #1373 from jeenu-arm/ras-support by Dimitris Papastamos · Tue May 15 15:34:20 2018 +0100
  2. a1cf3c5 Merge pull request #1377 from robertovargas-arm/compiler-warnings by Dimitris Papastamos · Wed May 09 13:40:35 2018 +0100
  3. 0bc60d0 xlat: Fix warning in CHECK_VIRT_ADDR_SPACE_SIZE by Roberto Vargas · Wed May 09 11:27:30 2018 +0100
  4. f3c0aba Merge pull request #1354 from robertovargas-arm/mem_protect by danh-arm · Tue May 08 11:21:04 2018 +0100
  5. f00da74 RAS: Add fault injection support by Jeenu Viswambharan · Fri Dec 08 12:13:51 2017 +0000
  6. d86cc5b RAS: Allow individual interrupt registration by Jeenu Viswambharan · Tue Dec 12 10:34:58 2017 +0000
  7. 2e2e881 RAS: Add support for node registration by Jeenu Viswambharan · Fri Dec 08 15:38:21 2017 +0000
  8. 19f6cf2 RAS: Add helpers to access Standard Error Records by Jeenu Viswambharan · Thu Dec 07 08:43:05 2017 +0000
  9. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · Wed Apr 04 16:07:11 2018 +0100
  10. 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · Thu Nov 30 12:54:15 2017 +0000
  11. 39ed74d smccc: Fix checkpatch error in header file by Antonio Nino Diaz · Wed May 02 09:52:35 2018 +0100
  12. 8f42f71 Merge pull request #1363 from antonio-nino-diaz-arm/an/res1-ap by danh-arm · Tue May 01 15:31:44 2018 +0100
  13. 9e0f4f3 Merge pull request #1360 from antonio-nino-diaz-arm/an/smccc-v2 by danh-arm · Tue May 01 15:25:45 2018 +0100
  14. 550eb08 ARM platforms: Demonstrate mem_protect from el3_runtime by Roberto Vargas · Fri Jan 05 16:00:05 2018 +0000
  15. e93a0f4 types: use int-ll64 for both aarch32 and aarch64 by Masahiro Yamada · Fri Feb 02 15:09:36 2018 +0900
  16. 6292d77 arch_helpers: use u_register_t for register read/write by Masahiro Yamada · Fri Feb 02 21:19:17 2018 +0900
  17. 4907449 xlat: Set AP[1] to 1 when it is RES1 by Antonio Nino Diaz · Thu Apr 26 12:59:08 2018 +0100
  18. 35c8cfc Add support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · Mon Apr 23 15:43:29 2018 +0100
  19. 09f51d4 Merge pull request #1357 from antonio-nino-diaz-arm/an/fix-misra by Dimitris Papastamos · Wed Apr 18 10:54:26 2018 +0100
  20. e881147 Fix some MISRA defects in SPM code by Antonio Nino Diaz · Tue Apr 17 15:10:18 2018 +0100
  21. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · Wed Mar 28 15:52:03 2018 +0100
  22. 2257d6d Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements by Dimitris Papastamos · Thu Mar 29 13:20:05 2018 +0100
  23. 5cc3bc8 Clean usage of void pointers to access symbols by Joel Hutton · Wed Mar 21 11:40:57 2018 +0000
  24. de70183 lib: fix switch statements to comply with MISRA rules by Jonathan Wright · Tue Mar 13 17:45:42 2018 +0000
  25. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  26. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · Mon Mar 12 14:47:09 2018 +0000
  27. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · Mon Mar 12 13:27:02 2018 +0000
  28. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · Wed Feb 28 18:53:30 2018 +0000
  29. 2ca18d9 Fix MISRA rule 8.4 Part 1 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  30. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  31. 777dd43 Fix MISRA rule 8.3 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  32. 0b5dacd Merge pull request #1287 from davidcunado-arm/dc/fix_misra by davidcunado-arm · Wed Feb 28 09:48:35 2018 +0000
  33. 9c274f8 Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch by davidcunado-arm · Wed Feb 28 01:26:21 2018 +0000
  34. f317e5d Merge pull request #1274 from dp-arm/dp/a75 by davidcunado-arm · Tue Feb 27 21:58:42 2018 +0000
  35. c150312 Update ULL() macro and instances of ull to comply with MISRA by David Cunado · Fri Feb 16 21:12:58 2018 +0000
  36. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · Tue Feb 27 10:55:39 2018 +0000
  37. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · Wed Feb 14 10:28:36 2018 +0000
  38. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · Wed Feb 14 10:00:06 2018 +0000
  39. 5e8cd79 Implement {spe,sve}_supported() helpers and refactor code by Dimitris Papastamos · Mon Feb 19 14:52:19 2018 +0000
  40. 7c2a3ca Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · Fri Feb 23 15:07:54 2018 +0000
  41. e4794b7 Redefine SMC_UNK as -1 instead of 0xFFFFFFFF by Antonio Nino Diaz · Wed Feb 14 14:22:29 2018 +0000
  42. 4015b8b Merge pull request #1224 from masahir0y/gzip by davidcunado-arm · Tue Feb 06 05:12:28 2018 +0000
  43. 8ca3144 Merge pull request #1253 from dp-arm/dp/amu32 by davidcunado-arm · Fri Feb 02 11:14:17 2018 +0000
  44. 55a040e zlib: add gunzip() support by Masahiro Yamada · Fri Jan 26 11:42:01 2018 +0900
  45. 7e90696 Merge pull request #1240 from dp-arm/dp/smccc by davidcunado-arm · Thu Feb 01 10:39:05 2018 +0000
  46. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · Thu Dec 21 15:21:20 2017 +0000
  47. 2691bc6 AMU: Add assembler helper functions for aarch32 by Joel Hutton · Tue Dec 12 15:47:55 2017 +0000
  48. f0781f3 Merge pull request #1235 from jwerner-chromium/JW_udelay by davidcunado-arm · Tue Jan 30 08:59:35 2018 +0000
  49. b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · Thu Jan 11 15:29:36 2018 +0000
  50. 0dcdb1a Implement support for SMCCC v1.1 by Dimitris Papastamos · Fri Jan 19 16:58:29 2018 +0000
  51. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · Thu Jan 25 00:06:50 2018 +0000
  52. d79d40d Merge pull request #1193 from jwerner-chromium/JW_coreboot by davidcunado-arm · Wed Jan 24 14:31:53 2018 +0000
  53. 54b6d20 Make div_round_up() correct for divisors that are not a power of 2 by Julius Werner · Mon Jan 22 13:56:13 2018 -0800
  54. b624ae0 Add platform-independent coreboot support library by Julius Werner · Fri Jun 09 15:17:15 2017 -0700
  55. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · Fri Jan 19 13:40:12 2018 +0000
  56. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · Wed Jan 03 10:48:59 2018 +0000
  57. 0a4cded sp_min: Implement workaround for CVE-2017-5715 by Dimitris Papastamos · Tue Jan 02 11:37:02 2018 +0000
  58. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · Mon Oct 30 14:43:43 2017 +0000
  59. ff3ecb6 utils: rename struct mem_region_t to struct mem_region by Masahiro Yamada · Tue Jan 16 23:15:38 2018 +0900
  60. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · Fri Jan 12 09:02:24 2018 +0000
  61. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · Mon Dec 11 11:45:35 2017 +0000
  62. eaf3e6d AMU: Add hooks to save/restore AMU context by Dimitris Papastamos · Tue Nov 28 13:47:06 2017 +0000
  63. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · Mon Nov 13 09:49:45 2017 +0000
  64. 60346db AMU: Add plat interface to select which group 1 counters to enable by Dimitris Papastamos · Wed Dec 13 10:54:37 2017 +0000
  65. d1a1841 Add PubSub events for CPU powerdown/powerup by Dimitris Papastamos · Tue Nov 28 15:16:00 2017 +0000
  66. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · Tue Jan 02 15:53:01 2018 +0000
  67. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · Mon Dec 18 13:46:21 2017 +0000
  68. 02eb727 utils_def: Add REGSZ and make BIT() assembly-compatible by Julius Werner · Tue Dec 12 14:23:26 2017 -0800
  69. 4213a3f Merge pull request #1178 from davidcunado-arm/dc/enable_sve by davidcunado-arm · Mon Dec 11 12:29:47 2017 +0000
  70. 086fbd6 SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM by Antonio Nino Diaz · Fri Nov 17 11:48:55 2017 +0000
  71. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  72. dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · Tue Oct 17 14:03:14 2017 +0100
  73. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100
  74. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · Mon Oct 16 11:40:10 2017 +0100
  75. 42ef554 Merge pull request #1145 from etienne-lms/rfc-armv7-2 by davidcunado-arm · Thu Nov 23 23:41:24 2017 +0000
  76. 004216b Merge pull request #1163 from antonio-nino-diaz-arm/an/parange by davidcunado-arm · Thu Nov 23 00:39:55 2017 +0000
  77. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100
  78. b9ef664 Add ARMv8.2 ID_AA64MMFR0_EL1.PARange value by Antonio Nino Diaz · Fri Nov 17 09:52:53 2017 +0000
  79. d1a1fd4 Move FPEXC32_EL2 to FP Context by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  80. 1dc771b ARM platforms: Provide SDEI entry point validation by Jeenu Viswambharan · Thu Oct 19 09:15:15 2017 +0100
  81. 10a6727 BL31: Introduce Exception Handling Framework by Jeenu Viswambharan · Fri Sep 22 08:32:10 2017 +0100
  82. baa1611 Merge pull request #1148 from antonio-nino-diaz-arm/an/spm by davidcunado-arm · Thu Nov 09 22:38:37 2017 +0000
  83. c41f206 SPM: Introduce Secure Partition Manager by Antonio Nino Diaz · Tue Oct 24 10:07:35 2017 +0100
  84. bafc753 xlat: Make function to calculate TCR PA bits public by Antonio Nino Diaz · Wed Oct 25 11:53:25 2017 +0100
  85. a257986 aarch32: add missing dmb() macro by Etienne Carriere · Sun Nov 05 22:57:29 2017 +0100
  86. 4cce835 ARMv7 may not support Virtualization Extensions by Etienne Carriere · Wed Nov 08 14:38:33 2017 +0100
  87. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · Sun Nov 05 22:56:50 2017 +0100
  88. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · Sun Nov 05 22:56:41 2017 +0100
  89. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · Sun Nov 05 22:56:34 2017 +0100
  90. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · Sun Nov 05 22:56:26 2017 +0100
  91. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · Sun Nov 05 22:56:19 2017 +0100
  92. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · Sun Nov 05 22:56:10 2017 +0100
  93. 70a004b ARMv7 architecture have specific system registers by Etienne Carriere · Sun Nov 05 22:56:03 2017 +0100
  94. 31036d5 Merge pull request #1153 from robertovargas-arm/fix-macros by davidcunado-arm · Mon Nov 06 13:59:42 2017 +0000
  95. 31ea969 Merge pull request #1151 from JoelHutton/jh/MISRA-Mandatory by davidcunado-arm · Fri Nov 03 20:59:57 2017 +0000
  96. 8247796 Fix usage of IMAGE_BLx macros by Roberto Vargas · Mon Oct 23 08:22:17 2017 +0100
  97. 43a4d57 Change sizeof to use type of struct not function by Joel Hutton · Fri Oct 20 10:31:14 2017 +0100
  98. a7921b9 aarch64: Add PubSub events to capture security state transitions by Dimitris Papastamos · Fri Oct 13 15:27:58 2017 +0100
  99. 55e56a9 PSCI: Publish CPU ON event by Jeenu Viswambharan · Fri Sep 22 08:32:10 2017 +0100
  100. e3f2200 BL31: Introduce Publish and Subscribe framework by Jeenu Viswambharan · Fri Sep 22 08:32:10 2017 +0100