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cpus
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e34bd09
Workaround for CVE-2017-5715 on NVIDIA Denver CPUs
by Varun Wadekar
· 7 years ago
6e1796e
Check presence of fix for errata 835769 in Cortex-A53
by Jonathan Wright
· 7 years ago
efb1f33
Check presence of fix for errata 843419 in Cortex-A53
by Jonathan Wright
· 7 years ago
914757c
Fixup `SMCCC_ARCH_FEATURES` semantics
by Dimitris Papastamos
· 7 years ago
780cc95
Use PFR0 to identify need for mitigation of CVE-2017-5715
by Dimitris Papastamos
· 7 years ago
864364a
MISRA fixes for Cortex A75 AMU implementation
by Dimitris Papastamos
· 7 years ago
1be747f
Refactor AMU support for Cortex A75
by Dimitris Papastamos
· 7 years ago
0b00f8a
Factor out CPU AMU helpers
by Dimitris Papastamos
· 7 years ago
d1e1930
Fixup AArch32 errata printing framework
by Soby Mathew
· 7 years ago
8ca3144
Merge pull request #1253 from dp-arm/dp/amu32
by davidcunado-arm
· 7 years ago
0dcdd8d
AMU: Implement context save/restore for aarch32
by Joel Hutton
· 7 years ago
2880363
Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75
by Dimitris Papastamos
· 7 years ago
b63c6f1
Optimize/cleanup BPIALL workaround
by Dimitris Papastamos
· 7 years ago
04285cf
Merge pull request #1228 from dp-arm/dp/cve_2017_5715
by davidcunado-arm
· 7 years ago
471fb9b
Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-reset-fix
by davidcunado-arm
· 7 years ago
b5d1f8e
Merge pull request #1200 from robertovargas-arm/bl2-el3
by davidcunado-arm
· 7 years ago
e37c029
lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode
by Manoj Kumar
· 7 years ago
8ca0af2
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· 7 years ago
858bd61
Print erratum application report for CVE-2017-5715
by Dimitris Papastamos
· 7 years ago
84e02dc
Change the default errata format string
by Dimitris Papastamos
· 7 years ago
e0e9946
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· 7 years ago
fa2b736
Merge pull request #1197 from dp-arm/dp/amu
by davidcunado-arm
· 7 years ago
d7e2e9e
Add hooks to save/restore AMU context for Cortex A75
by Dimitris Papastamos
· 7 years ago
43e05ec
Use PFR0 to identify need for mitigation of CVE-2017-5915
by Dimitris Papastamos
· 7 years ago
c52ebdc
Workaround for CVE-2017-5715 on Cortex A73 and A75
by Dimitris Papastamos
· 7 years ago
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· 7 years ago
4c24bb7
Merge pull request #1168 from matt2048/master
by davidcunado-arm
· 7 years ago
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· 7 years ago
41b0094
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
by Matt Ma
· 7 years ago
09d26a6
ARMv7: introduce Cortex-A12
by Etienne Carriere
· 7 years ago
010dd1f
ARMv7: introduce Cortex-A17
by Etienne Carriere
· 7 years ago
f2f7b91
ARMv7: introduce Cortex-A7
by Etienne Carriere
· 7 years ago
37f8cdc
ARMv7: introduce Cortex-A5
by Etienne Carriere
· 7 years ago
a1249e0
ARMv7: introduce Cortex-A9
by Etienne Carriere
· 7 years ago
4ece755
ARMv7: introduce Cortex-A15
by Etienne Carriere
· 7 years ago
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· 7 years ago
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· 7 years ago
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 7 years ago
9930501
Fix order of #includes
by Isla Mitchell
· 7 years ago
d0c8273
Introduce TF_LDFLAGS
by Douglas Raillard
· 7 years ago
505f467
Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53
by danh-arm
· 7 years ago
8a354f1
Resolve signed-unsigned comparison issues
by David Cunado
· 7 years ago
d56fb04
Apply workarounds for A53 Cat A Errata 835769 and 843419
by Douglas Raillard
· 7 years ago
2b40ca6
aarch32: Implement errata workarounds for Cortex A57
by Dimitris Papastamos
· 7 years ago
9c47a5a
aarch32: Implement errata workarounds for Cortex A53
by Dimitris Papastamos
· 7 years ago
370542e
aarch32: Implement cpu_rev_var_hs()
by Dimitris Papastamos
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
66231d1
Tegra: enable 'signed-comparison' compilation warning/errors
by Varun Wadekar
· 7 years ago
805c2c7
Add support for Cortex-A75 and Cortex-A55 CPUs
by David Wang
· 8 years ago
815faa8
Use a callee-saved register to be AAPCS-compliant
by dp-arm
· 8 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
bf360df
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
by davidcunado-arm
· 8 years ago
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· 8 years ago
7c65c1e
Remove build option `ASM_ASSERTION`
by Antonio Nino Diaz
· 8 years ago
8cbdab2
Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test
by davidcunado-arm
· 8 years ago
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· 8 years ago
9d92e8c
Replace ASM signed tests with unsigned
by Douglas Raillard
· 8 years ago
c4364f6
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
by davidcunado-arm
· 8 years ago
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· 8 years ago
0a7e27c
Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3
by davidcunado-arm
· 8 years ago
8f87cc3
cpus: denver: remove barrier from denver_enable_dco()
by Varun Wadekar
· 9 years ago
1cc176b
Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc
by danh-arm
· 8 years ago
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· 9 years ago
c847f66
Clarify errata ERRATA_A53_836870 documentation
by Douglas Raillard
· 8 years ago
3c337a6
cpus: Add support for all Denver variants
by Varun Wadekar
· 9 years ago
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· 8 years ago
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· 8 years ago
1f5f812
Correct system include order
by David Cunado
· 8 years ago
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· 8 years ago
adb7027
AArch32: Fix the stack alignment issue
by Soby Mathew
· 8 years ago
a4c219a
AArch32: Add support for ARM Cortex-A32 MPCore Processor
by Yatharth Kochar
· 8 years ago
f528faf
AArch32: Common changes needed for BL1/BL2
by Yatharth Kochar
· 8 years ago
748be1d
AArch32: Add support in TF libraries
by Soby Mathew
· 9 years ago
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· 8 years ago
63af687
Add support for ARM Cortex-A73 MPCore Processor
by Yatharth Kochar
· 9 years ago
143ef1a
Add support for Cortex-A57 erratum 833471 workaround
by Sandrine Bailleux
· 9 years ago
adcbd55
Add support for Cortex-A57 erratum 826977 workaround
by Sandrine Bailleux
· 9 years ago
48cbe85
Add support for Cortex-A57 erratum 829520 workaround
by Sandrine Bailleux
· 9 years ago
c11116f
Add support for Cortex-A57 erratum 828024 workaround
by Sandrine Bailleux
· 9 years ago
a7e0c53
Add support for Cortex-A57 erratum 826974 workaround
by Sandrine Bailleux
· 9 years ago
afa8a78
Fix wording in cpu-ops.mk comments
by Sandrine Bailleux
· 9 years ago
6b28c57
Make cpu operations warning a VERBOSE print
by Soby Mathew
· 9 years ago
f12a31d
Cortex-Axx: Unconditionally apply CPU reset operations
by Sandrine Bailleux
· 9 years ago
d481759
Disable non-temporal hint on Cortex-A53/57
by Sandrine Bailleux
· 9 years ago
432aa77
Add support for ARM Cortex-A35 processor
by Sandrine Bailleux
· 9 years ago
4fceaca
cortex_a53: Add A53 errata #826319, #836870
by developer
· 9 years ago
28463b9
Add "Project Denver" CPU support
by Varun Wadekar
· 9 years ago
e364a8a
Fix recursive crash prints on FVP AEM model
by Soby Mathew
· 10 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 10 years ago
632432b
Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support
by danh-arm
· 10 years ago
c47e011
Add support for ARM Cortex-A72 processor
by Vikram Kanigiri
· 10 years ago
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
7d861ea
Invalidate the dcache after initializing cpu-ops
by Soby Mathew
· 10 years ago
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· 10 years ago
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· 10 years ago
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· 10 years ago
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· 10 years ago
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· 10 years ago
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