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git01.mediatek.com / filogic / atf / 10c2f2db5d979c0bfbce963912a216d15fee8dbd / include / bl31 / interrupt_mgmt.h
  1. fb13a23 fix(bl31): fix validate_el3_interrupt_rm preprocessor usage by Marco Felsch · Wed Sep 21 17:37:01 2022 +0200
  2. 669bf40 fix(bl31): allow use of EHF with S-EL2 SPMC by Raghu Krishnamurthy · Mon Jul 25 14:44:33 2022 -0700
  3. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · Fri Jan 24 13:30:28 2020 +0000
  4. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  5. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  6. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  7. e0b757d Fix MISRA defects in BL31 common code by Antonio Nino Diaz · Fri Aug 24 16:30:29 2018 +0100
  8. 837cc9c EHF: MISRA fixes by Jeenu Viswambharan · Thu Aug 02 10:14:12 2018 +0100
  9. 32ceef5 SDEI: MISRA fixes by Jeenu Viswambharan · Thu Aug 02 10:14:12 2018 +0100
  10. 777dd43 Fix MISRA rule 8.3 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  11. f4194ee Deprecate one EL3 interrupt routing model with EL3 exception handling by Jeenu Viswambharan · Wed Jan 10 15:00:20 2018 +0000
  12. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  13. dce70b3 GIC: Add API to set interrupt routing by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  14. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · Thu May 25 18:04:48 2017 -0700
  15. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  16. 58e32d1 Enable support for EL3 interrupt in IMF by Soby Mathew · Mon Nov 23 13:58:45 2015 +0000
  17. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · Tue Jan 13 15:48:26 2015 +0000
  18. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  19. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100