1. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · Sun Nov 05 22:56:50 2017 +0100
  2. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · Sun Nov 05 22:56:41 2017 +0100
  3. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · Sun Nov 05 22:56:34 2017 +0100
  4. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · Sun Nov 05 22:56:26 2017 +0100
  5. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · Sun Nov 05 22:56:19 2017 +0100
  6. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · Sun Nov 05 22:56:10 2017 +0100
  7. 70a004b ARMv7 architecture have specific system registers by Etienne Carriere · Sun Nov 05 22:56:03 2017 +0100
  8. 863858b ARMv7 does not support SDCR by Etienne Carriere · Sun Nov 05 22:55:55 2017 +0100
  9. 70b1c2f ARMv7 does not support STL instruction by Etienne Carriere · Sun Nov 05 22:55:47 2017 +0100
  10. 31036d5 Merge pull request #1153 from robertovargas-arm/fix-macros by davidcunado-arm · Mon Nov 06 13:59:42 2017 +0000
  11. 31ea969 Merge pull request #1151 from JoelHutton/jh/MISRA-Mandatory by davidcunado-arm · Fri Nov 03 20:59:57 2017 +0000
  12. 360051a Merge pull request #1137 from soby-mathew/sm/arm_plat_en_gicv3_save by davidcunado-arm · Fri Nov 03 13:12:48 2017 +0000
  13. bc265d8 Merge pull request #1150 from dp-arm/dp/events by davidcunado-arm · Wed Nov 01 08:46:02 2017 +0000
  14. 8247796 Fix usage of IMAGE_BLx macros by Roberto Vargas · Mon Oct 23 08:22:17 2017 +0100
  15. b648b7d Merge pull request #1141 from robertovargas-arm/boot_redundancy by davidcunado-arm · Tue Oct 31 23:21:39 2017 +0000
  16. 43a4d57 Change sizeof to use type of struct not function by Joel Hutton · Fri Oct 20 10:31:14 2017 +0100
  17. a7921b9 aarch64: Add PubSub events to capture security state transitions by Dimitris Papastamos · Fri Oct 13 15:27:58 2017 +0100
  18. de431b1 plat/arm: enlarge the BL2 size on Arm platforms when TBB is enabled by Qixiang Xu · Fri Oct 13 09:23:42 2017 +0800
  19. bc1ae1f Add platform hooks for boot redundancy support by Roberto Vargas · Tue Sep 26 12:53:01 2017 +0100
  20. 55e56a9 PSCI: Publish CPU ON event by Jeenu Viswambharan · Fri Sep 22 08:32:10 2017 +0100
  21. e3f2200 BL31: Introduce Publish and Subscribe framework by Jeenu Viswambharan · Fri Sep 22 08:32:10 2017 +0100
  22. 8774735 Merge pull request #1131 from jeenu-arm/gic-migrate by davidcunado-arm · Sat Oct 21 22:50:35 2017 +0100
  23. c444fcf Merge pull request #1130 from jeenu-arm/gic-patches by davidcunado-arm · Sat Oct 21 22:18:48 2017 +0100
  24. 68c415a Merge pull request #1136 from antonio-nino-diaz-arm/an/xlat-get-set-attr by davidcunado-arm · Fri Oct 20 17:17:09 2017 +0100
  25. a0a231d Merge pull request #1129 from robertovargas-arm/enable_O0 by davidcunado-arm · Wed Oct 18 23:39:07 2017 +0100
  26. c88f683 Merge pull request #1127 from davidcunado-arm/dc/pmrc_init by davidcunado-arm · Tue Oct 17 13:53:17 2017 +0100
  27. 5ef6302 Merge pull request #1126 from robertovargas-arm/psci-v1.1 by davidcunado-arm · Tue Oct 17 12:18:23 2017 +0100
  28. 4613d5f Introduce functions to disable the MMU in EL1 by Antonio Nino Diaz · Thu Oct 05 15:19:42 2017 +0100
  29. 439c901 xlat: Introduce API to change memory attributes of a region by Sandrine Bailleux · Tue Oct 17 12:02:03 2017 +0100
  30. c3708e2 xlat: Introduce API to get memory attributes of a region by Sandrine Bailleux · Fri Oct 13 14:17:09 2017 +0100
  31. d017bcc xlat: Define translation regime in AArch32 by Antonio Nino Diaz · Mon Oct 16 15:25:22 2017 +0100
  32. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  33. 4684bce GIC: Add helpers to set interrupt configuration by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  34. 723dce0 ARM platforms: Migrate to using interrupt properties by Jeenu Viswambharan · Fri Sep 22 08:59:59 2017 +0100
  35. 6250507 GIC: Add API to set priority mask by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  36. eb1c12c GIC: Add API to set/clear interrupt pending by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  37. dce70b3 GIC: Add API to set interrupt routing by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  38. ab14e9b GIC: Add API to raise secure SGI by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  39. c06f05c GIC: Add APIs to set interrupt type and query support by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  40. 447b89d GIC: Add API to set interrupt priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  41. 0fcdfff GIC: Add APIs to enable and disable interrupt by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  42. 24e7029 GIC: Add API to get interrupt active status by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  43. 522a465 GIC: Add APIs to query interrupt types by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  44. 393fdd9 GICv2: Add driver API to set PE target mask by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  45. b1e957e GIC: Add API to get running priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  46. d2befb8 Merge pull request #1123 from robertovargas-arm/reset2 by davidcunado-arm · Mon Oct 16 16:31:13 2017 +0100
  47. c51cdb7 Fix use of MSR (immediate) by Roberto Vargas · Mon Sep 18 09:53:25 2017 +0100
  48. ffb34d0 Update PSCI version to 1.1 by Roberto Vargas · Mon Sep 11 09:11:58 2017 +0100
  49. 4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · Mon Oct 02 17:41:39 2017 +0100
  50. b820ad0 reset2: Add PSCI system_reset2 function by Roberto Vargas · Wed Jul 26 09:23:09 2017 +0100
  51. 9ca2806 ARM platforms: enable GICv3 state save/restore by Soby Mathew · Wed Oct 11 16:08:58 2017 +0100
  52. 3b5156e ARM platforms: Add support for EL3 TZC memory region by Soby Mathew · Thu Oct 05 12:27:33 2017 +0100
  53. b76da30 Merge pull request #1117 from antonio-nino-diaz-arm/an/xlat-improvements by davidcunado-arm · Mon Oct 09 23:09:29 2017 +0100
  54. 8ce779c Merge pull request #1118 from davidcunado-arm/dc/fix_coverity by davidcunado-arm · Fri Oct 06 16:28:45 2017 +0100
  55. c3bd8c2 Increase PLAT_ARM_MMAP_ENTRIES and MAX_XLAT_TABLES by David Cunado · Thu Oct 05 21:24:14 2017 +0100
  56. f6f1a32 GICv3: ITS architectural save and restore helpers by Soby Mathew · Tue Jul 18 16:12:45 2017 +0100
  57. 327548c GICv3: add functions for save and restore by Soby Mathew · Thu Jul 13 15:19:51 2017 +0100
  58. dcf9d92 xlat: Add support for EL0 and EL1 mappings by Antonio Nino Diaz · Wed Oct 04 16:52:15 2017 +0100
  59. 2d54579 xlat: Introduce function xlat_arch_tlbi_va_regime() by Douglas Raillard · Mon Sep 25 15:23:22 2017 +0100
  60. 8f23fa8 xlat: Introduce MAP_REGION2() macro by Sandrine Bailleux · Thu Sep 28 21:58:12 2017 +0100
  61. ae6e285 Merge pull request #1109 from robertovargas-arm/mem_protect by davidcunado-arm · Wed Oct 04 16:23:59 2017 +0100
  62. 56fcdd7 Merge pull request #1107 from geesun/qx/add_ecdsa_support by davidcunado-arm · Mon Oct 02 15:03:16 2017 +0100
  63. 7025cda xlat: remove cast in MAP_REGION to get back building with GCC 4.9 by Masahiro Yamada · Tue Sep 26 16:05:59 2017 +0900
  64. 502ca97 Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit by davidcunado-arm · Mon Sep 25 23:34:28 2017 +0100
  65. f8fda10 mem_protect: Add DRAM2 to the list of mem protected ranges by Roberto Vargas · Tue Aug 08 11:27:20 2017 +0100
  66. a1c16b6 mem_protect: Add mem_protect support in Juno and FVP for DRAM1 by Roberto Vargas · Thu Aug 03 09:16:43 2017 +0100
  67. c590770 Add mem_region utility functions by Roberto Vargas · Thu Aug 03 08:56:38 2017 +0100
  68. 0a4c261 mem_protect: Add mem_protect API by Roberto Vargas · Thu Aug 03 08:16:16 2017 +0100
  69. aa05eea Dynamic selection of ECDSA or RSA by Qixiang Xu · Thu Aug 24 15:26:39 2017 +0800
  70. 1c2aef1 Add support for TBBR using ECDSA keys in ARM platforms by Qixiang Xu · Thu Aug 24 15:12:20 2017 +0800
  71. a674feb plat/arm : update BL size macros to give BL1 and BL2 more space for TBB by Qixiang Xu · Thu Aug 24 14:28:08 2017 +0800
  72. f94e40d Fix type of `unsigned long` constants by Antonio Nino Diaz · Thu Sep 14 15:57:44 2017 +0100
  73. c8274a8 Set TCR_EL1.EPD1 bit to 1 by Antonio Nino Diaz · Fri Sep 15 10:30:34 2017 +0100
  74. f07b808 Merge pull request #1093 from soby-mathew/eb/log_fw by davidcunado-arm · Mon Sep 18 12:17:33 2017 +0100
  75. 9d3dc25 Merge pull request #1094 from douglas-raillard-arm/dr/fix_mmap_add_dynamic_region by davidcunado-arm · Fri Sep 15 14:32:08 2017 +0100
  76. f9c996a Merge pull request #1096 from davidcunado-arm/im/mair_attributes_helper by davidcunado-arm · Fri Sep 15 09:37:05 2017 +0100
  77. 9ce83d3 Merge pull request #1092 from jeenu-arm/errata-workarounds by davidcunado-arm · Wed Sep 13 14:52:24 2017 +0100
  78. a5f7281 plat/arm: Fix BL31_BASE when RESET_TO_BL31=1 by Qixiang Xu · Thu Aug 31 11:45:32 2017 +0800
  79. c40b59c Merge pull request #1088 from soby-mathew/sm/sds_scmi by davidcunado-arm · Tue Sep 12 08:43:38 2017 +0100
  80. 02c6307 Helper macro to create MAIR encodings by Isla Mitchell · Fri Jul 21 14:44:36 2017 +0100
  81. 35c09f1 xlat: Use MAP_REGION macro as compatibility layer by Douglas Raillard · Thu Aug 31 16:20:25 2017 +0100
  82. aaf15f5 Implement log framework by Soby Mathew · Mon Sep 04 11:49:29 2017 +0100
  83. f583a06 Introduce tf_vprintf() and tf_string_print() by Soby Mathew · Mon Sep 04 11:45:52 2017 +0100
  84. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · Wed Aug 02 18:33:41 2017 +0100
  85. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · Wed Aug 02 16:35:04 2017 +0100
  86. e94b06d Merge pull request #1078 from douglas-raillard-arm/dr/add_cfi_vector_entry by davidcunado-arm · Thu Sep 07 00:45:59 2017 +0100
  87. 878f03c Merge pull request #1019 from etienne-lms/log-size by davidcunado-arm · Thu Sep 07 00:40:59 2017 +0100
  88. 1ced6b8 CSS: Changes for SDS framework by Soby Mathew · Mon Jun 12 12:37:10 2017 +0100
  89. 20948c4 Fix JUNO AArch32 build by Soby Mathew · Wed Jul 05 15:07:05 2017 +0100
  90. b22fe23 Merge pull request #1076 from masahir0y/asm_macro by davidcunado-arm · Wed Sep 06 09:16:17 2017 +0100
  91. 874fc9e Fix BL2 memory map when OP-TEE is the Secure Payload by Soby Mathew · Fri Sep 01 13:43:50 2017 +0100
  92. 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · Fri Sep 01 10:22:20 2017 +0200
  93. b260c3a ARM platforms: Map TSP only when TSPD is included by Sandrine Bailleux · Wed Aug 30 10:59:22 2017 +0100
  94. efa50b5 Add CFI debug info to vector entries by Douglas Raillard · Mon Aug 07 16:20:46 2017 +0100
  95. be1d3ef asm_macros: set the default assembly code alignment to 4 byte by Masahiro Yamada · Thu Aug 31 14:29:34 2017 +0900
  96. baea3f6 Merge pull request #1066 from islmit01/im/enable_cnp_bit by danh-arm · Wed Aug 30 14:34:57 2017 +0100
  97. 194cb27 Merge pull request #1062 from jeenu-arm/cpu-fixes by danh-arm · Wed Aug 30 14:34:17 2017 +0100
  98. a681413 Merge pull request #1071 from jeenu-arm/syntax-fix by danh-arm · Tue Aug 29 15:25:36 2017 +0100
  99. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · Wed Aug 09 16:42:40 2017 +0100
  100. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · Wed Aug 09 10:36:08 2017 +0100