Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 1 | # |
Stephan Gerhold | 69fabaa | 2023-03-14 11:09:44 +0100 | [diff] [blame] | 2 | # Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | include drivers/arm/gic/v2/gicv2.mk |
| 8 | include lib/xlat_tables_v2/xlat_tables.mk |
| 9 | |
Stephan Gerhold | 4bc53a1 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 10 | PLAT_BL_COMMON_SOURCES := ${GICV2_SOURCES} \ |
| 11 | ${XLAT_TABLES_LIB_SRCS} \ |
| 12 | drivers/delay_timer/delay_timer.c \ |
| 13 | drivers/delay_timer/generic_delay_timer.c \ |
| 14 | plat/common/plat_gicv2.c \ |
| 15 | plat/qti/msm8916/msm8916_gicv2.c \ |
| 16 | plat/qti/msm8916/msm8916_setup.c \ |
| 17 | plat/qti/msm8916/${ARCH}/msm8916_helpers.S \ |
| 18 | plat/qti/msm8916/${ARCH}/uartdm_console.S |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 19 | |
Stephan Gerhold | a7c85b2 | 2022-09-02 23:38:23 +0200 | [diff] [blame] | 20 | MSM8916_CPU := $(if ${ARM_CORTEX_A7},cortex_a7,cortex_a53) |
Stephan Gerhold | 1b78346 | 2022-09-16 20:42:49 +0200 | [diff] [blame] | 21 | MSM8916_PM_SOURCES := drivers/arm/cci/cci.c \ |
| 22 | lib/cpus/${ARCH}/${MSM8916_CPU}.S \ |
Stephan Gerhold | 4bc53a1 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 23 | plat/common/plat_psci_common.c \ |
| 24 | plat/qti/msm8916/msm8916_config.c \ |
| 25 | plat/qti/msm8916/msm8916_cpu_boot.c \ |
| 26 | plat/qti/msm8916/msm8916_pm.c \ |
| 27 | plat/qti/msm8916/msm8916_topology.c |
| 28 | |
| 29 | BL31_SOURCES += ${MSM8916_PM_SOURCES} \ |
| 30 | plat/qti/msm8916/msm8916_bl31_setup.c |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 31 | |
Stephan Gerhold | b68e4e9 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 32 | PLAT_INCLUDES := -Iplat/qti/msm8916/include |
| 33 | |
| 34 | ifeq (${ARCH},aarch64) |
| 35 | # arm_macros.S exists only on aarch64 currently |
| 36 | PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} |
| 37 | endif |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 38 | |
| 39 | # Only BL31 is supported at the moment and is entered on a single CPU |
| 40 | RESET_TO_BL31 := 1 |
| 41 | COLD_BOOT_SINGLE_CPU := 1 |
| 42 | |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 43 | # Have different sections for code and rodata |
| 44 | SEPARATE_CODE_AND_RODATA := 1 |
| 45 | |
| 46 | # Single cluster |
| 47 | WARMBOOT_ENABLE_DCACHE_EARLY := 1 |
| 48 | |
| 49 | # Disable features unsupported in ARMv8.0 |
Andre Przywara | 30661a9 | 2023-02-03 15:30:14 +0000 | [diff] [blame] | 50 | ENABLE_SPE_FOR_NS := 0 |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 51 | ENABLE_SVE_FOR_NS := 0 |
| 52 | |
Stephan Gerhold | a7c85b2 | 2022-09-02 23:38:23 +0200 | [diff] [blame] | 53 | # Disable workarounds unnecessary for Cortex-A7/A53 |
Stephan Gerhold | 69fabaa | 2023-03-14 11:09:44 +0100 | [diff] [blame] | 54 | WORKAROUND_CVE_2017_5715 := 0 |
| 55 | WORKAROUND_CVE_2022_23960 := 0 |
| 56 | |
Stephan Gerhold | a7c85b2 | 2022-09-02 23:38:23 +0200 | [diff] [blame] | 57 | ifeq (${MSM8916_CPU},cortex_a53) |
Stephan Gerhold | 53145c3 | 2022-09-16 21:07:37 +0200 | [diff] [blame] | 58 | # The Cortex-A53 revision varies depending on the SoC revision. |
| 59 | # msm8916 uses r0p0, msm8939 uses r0p1 or r0p4. Enable all errata |
| 60 | # and rely on the runtime detection to apply them only if needed. |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 61 | ERRATA_A53_819472 := 1 |
| 62 | ERRATA_A53_824069 := 1 |
| 63 | ERRATA_A53_826319 := 1 |
| 64 | ERRATA_A53_827319 := 1 |
| 65 | ERRATA_A53_835769 := 1 |
| 66 | ERRATA_A53_836870 := 1 |
| 67 | ERRATA_A53_843419 := 1 |
Stephan Gerhold | 53145c3 | 2022-09-16 21:07:37 +0200 | [diff] [blame] | 68 | ERRATA_A53_855873 := 1 |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 69 | ERRATA_A53_1530924 := 1 |
Stephan Gerhold | a7c85b2 | 2022-09-02 23:38:23 +0200 | [diff] [blame] | 70 | endif |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 71 | |
Stephan Gerhold | d0fed05 | 2023-03-24 19:18:51 +0100 | [diff] [blame] | 72 | # Build config flags |
| 73 | # ------------------ |
| 74 | BL31_BASE ?= 0x86500000 |
Stephan Gerhold | d0fed05 | 2023-03-24 19:18:51 +0100 | [diff] [blame] | 75 | PRELOADED_BL33_BASE ?= 0x8f600000 |
| 76 | |
Stephan Gerhold | b68e4e9 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 77 | ifeq (${ARCH},aarch64) |
Juan Pablo Conde | 6aba3b1 | 2023-08-09 13:19:21 -0500 | [diff] [blame] | 78 | BL32_BASE ?= BL31_LIMIT |
| 79 | $(eval $(call add_define,BL31_BASE)) |
Stephan Gerhold | b68e4e9 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 80 | else |
Juan Pablo Conde | 6aba3b1 | 2023-08-09 13:19:21 -0500 | [diff] [blame] | 81 | ifeq (${AARCH32_SP},none) |
| 82 | $(error Variable AARCH32_SP has to be set for AArch32) |
| 83 | endif |
| 84 | # There is no BL31 on aarch32, so reuse its location for BL32 |
| 85 | BL32_BASE ?= $(BL31_BASE) |
Stephan Gerhold | b68e4e9 | 2022-08-28 15:18:55 +0200 | [diff] [blame] | 86 | endif |
Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 87 | $(eval $(call add_define,BL32_BASE)) |
Stephan Gerhold | 71939dd | 2022-09-02 23:29:17 +0200 | [diff] [blame] | 88 | |
| 89 | # UART number to use for TF-A output during early boot |
| 90 | QTI_UART_NUM ?= 2 |
| 91 | $(eval $(call assert_numeric,QTI_UART_NUM)) |
| 92 | $(eval $(call add_define,QTI_UART_NUM)) |
| 93 | |
| 94 | # Set to 1 on the command line to keep using UART after early boot. |
| 95 | # Requires reserving the UART and related clocks inside the normal world. |
| 96 | QTI_RUNTIME_UART ?= 0 |
| 97 | $(eval $(call assert_boolean,QTI_RUNTIME_UART)) |
| 98 | $(eval $(call add_define,QTI_RUNTIME_UART)) |