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Stephan Gerhold14fdf072021-12-01 20:01:11 +01001#
Stephan Gerhold69fabaa2023-03-14 11:09:44 +01002# Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
Stephan Gerhold14fdf072021-12-01 20:01:11 +01003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include drivers/arm/gic/v2/gicv2.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
Stephan Gerhold4bc53a12022-08-28 15:18:55 +020010PLAT_BL_COMMON_SOURCES := ${GICV2_SOURCES} \
11 ${XLAT_TABLES_LIB_SRCS} \
12 drivers/delay_timer/delay_timer.c \
13 drivers/delay_timer/generic_delay_timer.c \
14 plat/common/plat_gicv2.c \
15 plat/qti/msm8916/msm8916_gicv2.c \
16 plat/qti/msm8916/msm8916_setup.c \
17 plat/qti/msm8916/${ARCH}/msm8916_helpers.S \
18 plat/qti/msm8916/${ARCH}/uartdm_console.S
Stephan Gerhold14fdf072021-12-01 20:01:11 +010019
Stephan Gerholda7c85b22022-09-02 23:38:23 +020020MSM8916_CPU := $(if ${ARM_CORTEX_A7},cortex_a7,cortex_a53)
Stephan Gerhold1b783462022-09-16 20:42:49 +020021MSM8916_PM_SOURCES := drivers/arm/cci/cci.c \
22 lib/cpus/${ARCH}/${MSM8916_CPU}.S \
Stephan Gerhold4bc53a12022-08-28 15:18:55 +020023 plat/common/plat_psci_common.c \
24 plat/qti/msm8916/msm8916_config.c \
25 plat/qti/msm8916/msm8916_cpu_boot.c \
26 plat/qti/msm8916/msm8916_pm.c \
27 plat/qti/msm8916/msm8916_topology.c
28
29BL31_SOURCES += ${MSM8916_PM_SOURCES} \
30 plat/qti/msm8916/msm8916_bl31_setup.c
Stephan Gerhold14fdf072021-12-01 20:01:11 +010031
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020032PLAT_INCLUDES := -Iplat/qti/msm8916/include
33
34ifeq (${ARCH},aarch64)
35# arm_macros.S exists only on aarch64 currently
36PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
37endif
Stephan Gerhold14fdf072021-12-01 20:01:11 +010038
39# Only BL31 is supported at the moment and is entered on a single CPU
40RESET_TO_BL31 := 1
41COLD_BOOT_SINGLE_CPU := 1
42
Stephan Gerhold14fdf072021-12-01 20:01:11 +010043# Have different sections for code and rodata
44SEPARATE_CODE_AND_RODATA := 1
45
46# Single cluster
47WARMBOOT_ENABLE_DCACHE_EARLY := 1
48
49# Disable features unsupported in ARMv8.0
Andre Przywara30661a92023-02-03 15:30:14 +000050ENABLE_SPE_FOR_NS := 0
Stephan Gerhold14fdf072021-12-01 20:01:11 +010051ENABLE_SVE_FOR_NS := 0
52
Stephan Gerholda7c85b22022-09-02 23:38:23 +020053# Disable workarounds unnecessary for Cortex-A7/A53
Stephan Gerhold69fabaa2023-03-14 11:09:44 +010054WORKAROUND_CVE_2017_5715 := 0
55WORKAROUND_CVE_2022_23960 := 0
56
Stephan Gerholda7c85b22022-09-02 23:38:23 +020057ifeq (${MSM8916_CPU},cortex_a53)
Stephan Gerhold53145c32022-09-16 21:07:37 +020058# The Cortex-A53 revision varies depending on the SoC revision.
59# msm8916 uses r0p0, msm8939 uses r0p1 or r0p4. Enable all errata
60# and rely on the runtime detection to apply them only if needed.
Stephan Gerhold14fdf072021-12-01 20:01:11 +010061ERRATA_A53_819472 := 1
62ERRATA_A53_824069 := 1
63ERRATA_A53_826319 := 1
64ERRATA_A53_827319 := 1
65ERRATA_A53_835769 := 1
66ERRATA_A53_836870 := 1
67ERRATA_A53_843419 := 1
Stephan Gerhold53145c32022-09-16 21:07:37 +020068ERRATA_A53_855873 := 1
Stephan Gerhold14fdf072021-12-01 20:01:11 +010069ERRATA_A53_1530924 := 1
Stephan Gerholda7c85b22022-09-02 23:38:23 +020070endif
Stephan Gerhold14fdf072021-12-01 20:01:11 +010071
Stephan Gerholdd0fed052023-03-24 19:18:51 +010072# Build config flags
73# ------------------
74BL31_BASE ?= 0x86500000
Stephan Gerholdd0fed052023-03-24 19:18:51 +010075PRELOADED_BL33_BASE ?= 0x8f600000
76
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020077ifeq (${ARCH},aarch64)
78BL32_BASE ?= BL31_LIMIT
Stephan Gerhold14fdf072021-12-01 20:01:11 +010079$(eval $(call add_define,BL31_BASE))
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020080else
81# There is no BL31 on aarch32, so reuse its location for BL32
82BL32_BASE ?= $(BL31_BASE)
83endif
Stephan Gerhold14fdf072021-12-01 20:01:11 +010084$(eval $(call add_define,BL32_BASE))
Stephan Gerhold71939dd2022-09-02 23:29:17 +020085
86# UART number to use for TF-A output during early boot
87QTI_UART_NUM ?= 2
88$(eval $(call assert_numeric,QTI_UART_NUM))
89$(eval $(call add_define,QTI_UART_NUM))
90
91# Set to 1 on the command line to keep using UART after early boot.
92# Requires reserving the UART and related clocks inside the normal world.
93QTI_RUNTIME_UART ?= 0
94$(eval $(call assert_boolean,QTI_RUNTIME_UART))
95$(eval $(call add_define,QTI_RUNTIME_UART))