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Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +01001RMM-EL3 Communication interface
2*******************************
3
4This document defines the communication interface between RMM and EL3.
5There are two parts in this interface: the boot interface and the runtime
6interface.
7
8The Boot Interface defines the ABI between EL3 and RMM when the CPU enters
9R-EL2 for the first time after boot. The cold boot interface defines the ABI
10for the cold boot path and the warm boot interface defines the same for the
11warm path.
12
13The RMM-EL3 runtime interface defines the ABI for EL3 services which can be
14invoked by RMM as well as the register save-restore convention when handling an
15SMC call from NS.
16
17The below sections discuss these interfaces more in detail.
18
19.. _rmm_el3_ifc_versioning:
20
21RMM-EL3 Interface versioning
22____________________________
23
24The RMM Boot and Runtime Interface uses a version number to check
25compatibility with the register arguments passed as part of Boot Interface and
26RMM-EL3 runtime interface.
27
28The Boot Manifest, discussed later in section :ref:`rmm_el3_boot_manifest`,
29uses a separate version number but with the same scheme.
30
31The version number is a 32-bit type with the following fields:
32
33.. csv-table::
34 :header: "Bits", "Value"
35
36 [0:15],``VERSION_MINOR``
37 [16:30],``VERSION_MAJOR``
38 [31],RES0
39
40The version numbers are sequentially increased and the rules for updating them
41are explained below:
42
43 - ``VERSION_MAJOR``: This value is increased when changes break
44 compatibility with previous versions. If the changes
45 on the ABI are compatible with the previous one, ``VERSION_MAJOR``
46 remains unchanged.
47
48 - ``VERSION_MINOR``: This value is increased on any change that is backwards
49 compatible with the previous version. When ``VERSION_MAJOR`` is increased,
50 ``VERSION_MINOR`` must be set to 0.
51
52 - ``RES0``: Bit 31 of the version number is reserved 0 as to maintain
53 consistency with the versioning schemes used in other parts of RMM.
54
Shruti Gupta3440e562023-05-15 14:43:57 +010055This document specifies the 0.2 version of Boot Interface ABI and RMM-EL3
Harry Moulton5ff435e2024-03-28 10:16:50 +000056services specification and the 0.3 version of the Boot Manifest.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +010057
58.. _rmm_el3_boot_interface:
59
60RMM Boot Interface
61__________________
62
63This section deals with the Boot Interface part of the specification.
64
65One of the goals of the Boot Interface is to allow EL3 firmware to pass
66down into RMM certain platform specific information dynamically. This allows
67RMM to be less platform dependent and be more generic across platform
68variations. It also allows RMM to be decoupled from the other boot loader
69images in the boot sequence and remain agnostic of any particular format used
70for configuration files.
71
72The Boot Interface ABI defines a set of register conventions and
73also a memory based manifest file to pass information from EL3 to RMM. The
AlexeiFedorov288dad12023-01-18 14:53:56 +000074Boot Manifest and the associated platform data in it can be dynamically created
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +010075by EL3 and there is no restriction on how the data can be obtained (e.g by DTB,
76hoblist or other).
77
78The register convention and the manifest are versioned separately to manage
79future enhancements and compatibility.
80
81RMM completes the boot by issuing the ``RMM_BOOT_COMPLETE`` SMC (0xC40001CF)
82back to EL3. After the RMM has finished the boot process, it can only be
83entered from EL3 as part of RMI handling.
84
85If RMM returns an error during boot (in any CPU), then RMM must not be entered
86from any CPU.
87
88.. _rmm_cold_boot_interface:
89
90Cold Boot Interface
91~~~~~~~~~~~~~~~~~~~
92
93During cold boot RMM expects the following register values:
94
95.. csv-table::
96 :header: "Register", "Value"
97 :widths: 1, 5
98
99 x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of CPUs to be supported at runtime (see x2).
100 x1,Version for this Boot Interface as defined in :ref:`rmm_el3_ifc_versioning`.
101 x2,Maximum number of CPUs to be supported at runtime. RMM should ensure that it can support this maximum number.
AlexeiFedorov288dad12023-01-18 14:53:56 +0000102 x3,Base address for the shared buffer used for communication between EL3 firmware and RMM. This buffer must be of 4KB size (1 page). The Boot Manifest must be present at the base of this shared buffer during cold boot.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100103
Javier Almansa Sobrino04a6f2f2022-12-01 17:20:45 +0000104During cold boot, EL3 firmware needs to allocate a 4KB page that will be
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100105passed to RMM in x3. This memory will be used as shared buffer for communication
106between EL3 and RMM. It must be assigned to Realm world and must be mapped with
107Normal memory attributes (IWB-OWB-ISH) at EL3. At boot, this memory will be
108used to populate the Boot Manifest. Since the Boot Manifest can be accessed by
109RMM prior to enabling its MMU, EL3 must ensure that proper cache maintenance
110operations are performed after the Boot Manifest is populated.
111
112EL3 should also ensure that this shared buffer is always available for use by RMM
113during the lifetime of the system and that it can be used for runtime
114communication between RMM and EL3. For example, when RMM invokes attestation
115service commands in EL3, this buffer can be used to exchange data between RMM
116and EL3. It is also allowed for RMM to invoke runtime services provided by EL3
117utilizing this buffer during the boot phase, prior to return back to EL3 via
118RMM_BOOT_COMPLETE SMC.
119
120RMM should map this memory page into its Stage 1 page-tables using Normal
121memory attributes.
122
123During runtime, it is the RMM which initiates any communication with EL3. If that
124communication requires the use of the shared area, it is expected that RMM needs
125to do the necessary concurrency protection to prevent the use of the same buffer
126by other PEs.
127
128The following sequence diagram shows how a generic EL3 Firmware would boot RMM.
129
130.. image:: ../resources/diagrams/rmm_cold_boot_generic.png
131
132Warm Boot Interface
133~~~~~~~~~~~~~~~~~~~
134
135At warm boot, RMM is already initialized and only some per-CPU initialization
136is still pending. The only argument that is required by RMM at this stage is
137the CPU Id, which will be passed through register x0 whilst x1 to x3 are RES0.
138This is summarized in the following table:
139
140.. csv-table::
141 :header: "Register", "Value"
142 :widths: 1, 5
143
144 x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of CPUs to be supported at runtime (see x2).
145 x1 - x3,RES0
146
147Boot error handling and return values
148~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
149
150After boot up and initialization, RMM returns control back to EL3 through a
151``RMM_BOOT_COMPLETE`` SMC call. The only argument of this SMC call will
152be returned in x1 and it will encode a signed integer with the error reason
153as per the following table:
154
155.. csv-table::
156 :header: "Error code", "Description", "ID"
157 :widths: 2 4 1
158
159 ``E_RMM_BOOT_SUCCESS``,Boot successful,0
160 ``E_RMM_BOOT_ERR_UNKNOWN``,Unknown error,-1
161 ``E_RMM_BOOT_VERSION_NOT_VALID``,Boot Interface version reported by EL3 is not supported by RMM,-2
Javier Almansa Sobrino7a8e3b42023-11-30 13:54:44 +0000162 ``E_RMM_BOOT_CPUS_OUT_OF_RANGE``,Number of CPUs reported by EL3 larger than maximum supported by RMM,-3
163 ``E_RMM_BOOT_CPU_ID_OUT_OF_RANGE``,Current CPU Id is higher or equal than the number of CPUs supported by RMM,-4
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100164 ``E_RMM_BOOT_INVALID_SHARED_BUFFER``,Invalid pointer to shared memory area,-5
AlexeiFedorov288dad12023-01-18 14:53:56 +0000165 ``E_RMM_BOOT_MANIFEST_VERSION_NOT_SUPPORTED``,Version reported by the Boot Manifest not supported by RMM,-6
166 ``E_RMM_BOOT_MANIFEST_DATA_ERROR``,Error parsing core Boot Manifest,-7
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100167
168For any error detected in RMM during cold or warm boot, RMM will return back to
169EL3 using ``RMM_BOOT_COMPLETE`` SMC with an appropriate error code. It is
170expected that EL3 will take necessary action to disable Realm world for further
171entry from NS Host on receiving an error. This will be done across all the PEs
172in the system so as to present a symmetric view to the NS Host. Any further
173warm boot by any PE should not enter RMM using the warm boot interface.
174
175.. _rmm_el3_boot_manifest:
176
177Boot Manifest
178~~~~~~~~~~~~~
179
AlexeiFedorov288dad12023-01-18 14:53:56 +0000180During cold boot, EL3 Firmware passes a memory Boot Manifest to RMM containing
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100181platform information.
182
AlexeiFedorov288dad12023-01-18 14:53:56 +0000183This Boot Manifest is versioned independently of the Boot Interface, to help
184evolve the former independent of the latter.
Harry Moulton5ff435e2024-03-28 10:16:50 +0000185The current version for the Boot Manifest is ``v0.3`` and the rules explained
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100186in :ref:`rmm_el3_ifc_versioning` apply on this version as well.
187
Harry Moulton5ff435e2024-03-28 10:16:50 +0000188The Boot Manifest v0.3 has the following fields:
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100189
Harry Moulton5ff435e2024-03-28 10:16:50 +0000190 - version : Version of the Manifest (v0.3)
AlexeiFedorov288dad12023-01-18 14:53:56 +0000191 - plat_data : Pointer to the platform specific data and not specified by this
192 document. These data are optional and can be NULL.
193 - plat_dram : Structure encoding the NS DRAM information on the platform. This
Harry Moulton5ff435e2024-03-28 10:16:50 +0000194 field is optional and platform can choose to zero out this structure if
AlexeiFedorov288dad12023-01-18 14:53:56 +0000195 RMM does not need EL3 to send this information during the boot.
Harry Moulton5ff435e2024-03-28 10:16:50 +0000196 - plat_console : Structure encoding the list of consoles for RMM use on the
197 platform. This field is optional and platform can choose to not populate
198 the console list if this is not needed by the RMM for this platform.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100199
AlexeiFedorov288dad12023-01-18 14:53:56 +0000200For the current version of the Boot Manifest, the core manifest contains a pointer
201to the platform data. EL3 must ensure that the whole Boot Manifest, including
202the platform data, if available, fits inside the RMM EL3 shared buffer.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100203
AlexeiFedorov288dad12023-01-18 14:53:56 +0000204For the data structure specification of Boot Manifest, refer to
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100205:ref:`rmm_el3_manifest_struct`
206
207.. _runtime_services_and_interface:
208
Javier Almansa Sobrinof809b162022-07-04 17:06:36 +0100209RMM-EL3 Runtime Interface
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100210__________________________
211
212This section defines the RMM-EL3 runtime interface which specifies the ABI for
213EL3 services expected by RMM at runtime as well as the register save and
214restore convention between EL3 and RMM as part of RMI call handling. It is
215important to note that RMM is allowed to invoke EL3-RMM runtime interface
216services during the boot phase as well. The EL3 runtime service handling must
217not result in a world switch to another world unless specified. Both the RMM
218and EL3 are allowed to make suitable optimizations based on this assumption.
219
220If the interface requires the use of memory, then the memory references should
221be within the shared buffer communicated as part of the boot interface. See
222:ref:`rmm_cold_boot_interface` for properties of this shared buffer which both
223EL3 and RMM must adhere to.
224
225RMM-EL3 runtime service return codes
226~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
227
228The return codes from EL3 to RMM is a 32 bit signed integer which encapsulates
229error condition as described in the following table:
230
231.. csv-table::
232 :header: "Error code", "Description", "ID"
233 :widths: 2 4 1
234
235 ``E_RMM_OK``,No errors detected,0
236 ``E_RMM_UNK``,Unknown/Generic error,-1
237 ``E_RMM_BAD_ADDR``,The value of an address used as argument was invalid,-2
238 ``E_RMM_BAD_PAS``,Incorrect PAS,-3
239 ``E_RMM_NOMEM``,Not enough memory to perform an operation,-4
240 ``E_RMM_INVAL``,The value of an argument was invalid,-5
241
242If multiple failure conditions are detected in an RMM to EL3 command, then EL3
243is allowed to return an error code corresponding to any of the failure
244conditions.
245
246RMM-EL3 runtime services
247~~~~~~~~~~~~~~~~~~~~~~~~
248
249The following table summarizes the RMM runtime services that need to be
250implemented by EL3 Firmware.
251
252.. csv-table::
253 :header: "FID", "Command"
254 :widths: 2 5
255
Javier Almansa Sobrinof809b162022-07-04 17:06:36 +0100256 0xC400018F,``RMM_RMI_REQ_COMPLETE``
257 0xC40001B0,``RMM_GTSI_DELEGATE``
258 0xC40001B1,``RMM_GTSI_UNDELEGATE``
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100259 0xC40001B2,``RMM_ATTEST_GET_REALM_KEY``
260 0xC40001B3,``RMM_ATTEST_GET_PLAT_TOKEN``
261
Javier Almansa Sobrinof809b162022-07-04 17:06:36 +0100262RMM_RMI_REQ_COMPLETE command
263============================
264
265Notifies the completion of an RMI call to the Non-Secure world.
266
267This call is the only function currently in RMM-EL3 runtime interface which
268results in a world switch to NS. This call is the reply to the original RMI
269call and it is forwarded by EL3 to the NS world.
270
271FID
272---
273
274``0xC400018F``
275
276Input values
277------------
278
279.. csv-table::
280 :header: "Name", "Register", "Field", "Type", "Description"
281 :widths: 1 1 1 1 5
282
283 fid,x0,[63:0],UInt64,Command FID
284 err_code,x1,[63:0],RmiCommandReturnCode,Error code returned by the RMI service invoked by NS World. See Realm Management Monitor specification for more info
285
286Output values
287-------------
288
289This call does not return.
290
291Failure conditions
292------------------
293
294Since this call does not return to RMM, there is no failure condition which
295can be notified back to RMM.
296
297RMM_GTSI_DELEGATE command
298=========================
299
300Delegate a memory granule by changing its PAS from Non-Secure to Realm.
301
302FID
303---
304
305``0xC40001B0``
306
307Input values
308------------
309
310.. csv-table::
311 :header: "Name", "Register", "Field", "Type", "Description"
312 :widths: 1 1 1 1 5
313
314 fid,x0,[63:0],UInt64,Command FID
315 base_pa,x1,[63:0],Address,PA of the start of the granule to be delegated
316
317Output values
318-------------
319
320.. csv-table::
321 :header: "Name", "Register", "Field", "Type", "Description"
322 :widths: 1 1 1 2 4
323
324 Result,x0,[63:0],Error Code,Command return status
325
326Failure conditions
327------------------
328
329The table below shows all the possible error codes returned in ``Result`` upon
330a failure. The errors are ordered by condition check.
331
332.. csv-table::
333 :header: "ID", "Condition"
334 :widths: 1 5
335
336 ``E_RMM_BAD_ADDR``,``PA`` does not correspond to a valid granule address
337 ``E_RMM_BAD_PAS``,The granule pointed by ``PA`` does not belong to Non-Secure PAS
338 ``E_RMM_OK``,No errors detected
339
340RMM_GTSI_UNDELEGATE command
341===========================
342
343Undelegate a memory granule by changing its PAS from Realm to Non-Secure.
344
345FID
346---
347
348``0xC40001B1``
349
350Input values
351------------
352
353.. csv-table::
354 :header: "Name", "Register", "Field", "Type", "Description"
355 :widths: 1 1 1 1 5
356
357 fid,x0,[63:0],UInt64,Command FID
358 base_pa,x1,[63:0],Address,PA of the start of the granule to be undelegated
359
360Output values
361-------------
362
363.. csv-table::
364 :header: "Name", "Register", "Field", "Type", "Description"
365 :widths: 1 1 1 2 4
366
367 Result,x0,[63:0],Error Code,Command return status
368
369Failure conditions
370------------------
371
372The table below shows all the possible error codes returned in ``Result`` upon
373a failure. The errors are ordered by condition check.
374
375.. csv-table::
376 :header: "ID", "Condition"
377 :widths: 1 5
378
379 ``E_RMM_BAD_ADDR``,``PA`` does not correspond to a valid granule address
380 ``E_RMM_BAD_PAS``,The granule pointed by ``PA`` does not belong to Realm PAS
381 ``E_RMM_OK``,No errors detected
382
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100383RMM_ATTEST_GET_REALM_KEY command
384================================
385
386Retrieve the Realm Attestation Token Signing key from EL3.
387
388FID
389---
390
391``0xC40001B2``
392
393Input values
394------------
395
396.. csv-table::
397 :header: "Name", "Register", "Field", "Type", "Description"
398 :widths: 1 1 1 1 5
399
400 fid,x0,[63:0],UInt64,Command FID
401 buf_pa,x1,[63:0],Address,PA where the Realm Attestation Key must be stored by EL3. The PA must belong to the shared buffer
402 buf_size,x2,[63:0],Size,Size in bytes of the Realm Attestation Key buffer. ``bufPa + bufSize`` must lie within the shared buffer
403 ecc_curve,x3,[63:0],Enum,Type of the elliptic curve to which the requested attestation key belongs to. See :ref:`ecc_curves`
404
405Output values
406-------------
407
408.. csv-table::
409 :header: "Name", "Register", "Field", "Type", "Description"
410 :widths: 1 1 1 1 5
411
412 Result,x0,[63:0],Error Code,Command return status
413 keySize,x1,[63:0],Size,Size of the Realm Attestation Key
414
415Failure conditions
416------------------
417
418The table below shows all the possible error codes returned in ``Result`` upon
419a failure. The errors are ordered by condition check.
420
421.. csv-table::
422 :header: "ID", "Condition"
423 :widths: 1 5
424
425 ``E_RMM_BAD_ADDR``,``PA`` is outside the shared buffer
426 ``E_RMM_INVAL``,``PA + BSize`` is outside the shared buffer
427 ``E_RMM_INVAL``,``Curve`` is not one of the listed in :ref:`ecc_curves`
428 ``E_RMM_UNK``,An unknown error occurred whilst processing the command
429 ``E_RMM_OK``,No errors detected
430
431.. _ecc_curves:
432
433Supported ECC Curves
434--------------------
435
436.. csv-table::
437 :header: "ID", "Curve"
438 :widths: 1 5
439
440 0,ECC SECP384R1
441
442RMM_ATTEST_GET_PLAT_TOKEN command
443=================================
444
445Retrieve the Platform Token from EL3.
446
447FID
448---
449
450``0xC40001B3``
451
452Input values
453------------
454
455.. csv-table::
456 :header: "Name", "Register", "Field", "Type", "Description"
457 :widths: 1 1 1 1 5
458
459 fid,x0,[63:0],UInt64,Command FID
460 buf_pa,x1,[63:0],Address,PA of the platform attestation token. The challenge object is passed in this buffer. The PA must belong to the shared buffer
461 buf_size,x2,[63:0],Size,Size in bytes of the platform attestation token buffer. ``bufPa + bufSize`` must lie within the shared buffer
462 c_size,x3,[63:0],Size,Size in bytes of the challenge object. It corresponds to the size of one of the defined SHA algorithms
463
464Output values
465-------------
466
467.. csv-table::
468 :header: "Name", "Register", "Field", "Type", "Description"
469 :widths: 1 1 1 1 5
470
471 Result,x0,[63:0],Error Code,Command return status
472 tokenSize,x1,[63:0],Size,Size of the platform token
473
474Failure conditions
475------------------
476
477The table below shows all the possible error codes returned in ``Result`` upon
478a failure. The errors are ordered by condition check.
479
480.. csv-table::
481 :header: "ID", "Condition"
482 :widths: 1 5
483
484 ``E_RMM_BAD_ADDR``,``PA`` is outside the shared buffer
485 ``E_RMM_INVAL``,``PA + BSize`` is outside the shared buffer
486 ``E_RMM_INVAL``,``CSize`` does not represent the size of a supported SHA algorithm
487 ``E_RMM_UNK``,An unknown error occurred whilst processing the command
488 ``E_RMM_OK``,No errors detected
489
490RMM-EL3 world switch register save restore convention
491_____________________________________________________
492
493As part of NS world switch, EL3 is expected to maintain a register context
494specific to each world and will save and restore the registers
495appropriately. This section captures the contract between EL3 and RMM on the
496register set to be saved and restored.
497
498EL3 must maintain a separate register context for the following:
499
500 #. General purpose registers (x0-x30) and ``sp_el0``, ``sp_el2`` stack pointers
501 #. EL2 system register context for all enabled features by EL3. These include system registers with the ``_EL2`` prefix. The EL2 physical and virtual timer registers must not be included in this.
502
AlexeiFedorov90ce18f2022-09-23 16:57:28 +0100503As part of SMC forwarding between the NS world and Realm world, EL3 allows x0-x7 to be passed
504as arguments to Realm and x0-x4 to be used for return arguments back to Non Secure.
505As per SMCCCv1.2, x4 must be preserved if not being used as return argument by the SMC function
506and it is the responsibility of RMM to preserve this or use this as a return argument.
507EL3 will always copy x0-x4 from Realm context to NS Context.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100508
Shruti Gupta3440e562023-05-15 14:43:57 +0100509EL3 must save and restore the following as part of world switch:
510 #. EL2 system registers with the exception of ``zcr_el2`` register.
511 #. PAuth key registers (APIA, APIB, APDA, APDB, APGA).
512
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100513EL3 will not save some registers as mentioned in the below list. It is the
514responsibility of RMM to ensure that these are appropriately saved if the
515Realm World makes use of them:
516
517 #. FP/SIMD registers
518 #. SVE registers
519 #. SME registers
Shruti Gupta3440e562023-05-15 14:43:57 +0100520 #. EL1/0 registers with the exception of PAuth key registers as mentioned above.
521 #. zcr_el2 register.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100522
Shruti Gupta3440e562023-05-15 14:43:57 +0100523It is essential that EL3 honors this contract to maintain the Confidentiality and integrity
524of the Realm world.
AlexeiFedorov90ce18f2022-09-23 16:57:28 +0100525
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100526SMCCC v1.3 allows NS world to specify whether SVE context is in use. In this
527case, RMM could choose to not save the incoming SVE context but must ensure
528to clear SVE registers if they have been used in Realm World. The same applies
529to SME registers.
530
531Types
532_____
533
534.. _rmm_el3_manifest_struct:
535
Javier Almansa Sobrino04a6f2f2022-12-01 17:20:45 +0000536RMM-EL3 Boot Manifest structure
537~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100538
Harry Moulton5ff435e2024-03-28 10:16:50 +0000539The RMM-EL3 Boot Manifest v0.3 structure contains platform boot information passed
540from EL3 to RMM. The size of the Boot Manifest is 64 bytes.
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100541
542The members of the RMM-EL3 Boot Manifest structure are shown in the following
543table:
544
Harry Moulton5ff435e2024-03-28 10:16:50 +0000545+--------------+--------+----------------+----------------------------------------+
546| Name | Offset | Type | Description |
547+==============+========+================+========================================+
548| version | 0 | uint32_t | Boot Manifest version |
549+--------------+--------+----------------+----------------------------------------+
550| padding | 4 | uint32_t | Reserved, set to 0 |
551+--------------+--------+----------------+----------------------------------------+
552| plat_data | 8 | uintptr_t | Pointer to Platform Data section |
553+--------------+--------+----------------+----------------------------------------+
554| plat_dram | 16 | ns_dram_info | NS DRAM Layout Info structure |
555+--------------+--------+----------------+----------------------------------------+
556| plat_console | 40 | console_list | List of consoles available to RMM |
557+--------------+--------+----------------+----------------------------------------+
AlexeiFedorov288dad12023-01-18 14:53:56 +0000558
559.. _ns_dram_info_struct:
560
561NS DRAM Layout Info structure
562~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
563
564NS DRAM Layout Info structure contains information about platform Non-secure
565DRAM layout. The members of this structure are shown in the table below:
566
567+-----------+--------+----------------+----------------------------------------+
568| Name | Offset | Type | Description |
569+===========+========+================+========================================+
570| num_banks | 0 | uint64_t | Number of NS DRAM banks |
571+-----------+--------+----------------+----------------------------------------+
572| banks | 8 | ns_dram_bank * | Pointer to 'ns_dram_bank'[] array |
573+-----------+--------+----------------+----------------------------------------+
574| checksum | 16 | uint64_t | Checksum |
575+-----------+--------+----------------+----------------------------------------+
576
577Checksum is calculated as two's complement sum of 'num_banks', 'banks' pointer
578and DRAM banks data array pointed by it.
579
580.. _ns_dram_bank_struct:
581
582NS DRAM Bank structure
583~~~~~~~~~~~~~~~~~~~~~~
584
585NS DRAM Bank structure contains information about each Non-secure DRAM bank:
586
587+-----------+--------+----------------+----------------------------------------+
588| Name | Offset | Type | Description |
589+===========+========+================+========================================+
590| base | 0 | uintptr_t | Base address |
591+-----------+--------+----------------+----------------------------------------+
592| size | 8 | uint64_t | Size of bank in bytes |
593+-----------+--------+----------------+----------------------------------------+
594
Harry Moulton5ff435e2024-03-28 10:16:50 +0000595.. _console_list_struct:
596
597Console List structure
598~~~~~~~~~~~~~~~~~~~~~~
599
600Console List structure contains information about the available consoles for RMM.
601The members of this structure are shown in the table below:
602
603+--------------+--------+----------------+----------------------------------------+
604| Name | Offset | Type | Description |
605+==============+========+================+========================================+
606| num_consoles | 0 | uint64_t | Number of consoles |
607+--------------+--------+----------------+----------------------------------------+
608| consoles | 8 | console_info * | Pointer to 'console_info'[] array |
609+--------------+--------+----------------+----------------------------------------+
610| checksum | 16 | uint64_t | Checksum |
611+--------------+--------+----------------+----------------------------------------+
612
613Checksum is calculated as two's complement sum of 'num_consoles', 'consoles'
614pointer and the consoles array pointed by it.
615
616.. _console_info_struct:
617
618Console Info structure
619~~~~~~~~~~~~~~~~~~~~~~
620
621Console Info structure contains information about each Console available to RMM.
AlexeiFedorov288dad12023-01-18 14:53:56 +0000622
Harry Moulton5ff435e2024-03-28 10:16:50 +0000623+-----------+--------+---------------+----------------------------------------+
624| Name | Offset | Type | Description |
625+===========+========+===============+========================================+
626| base | 0 | uintptr_t | Console Base address |
627+-----------+--------+---------------+----------------------------------------+
628| map_pages | 8 | uint64_t | Num of pages to map for console MMIO |
629+-----------+--------+---------------+----------------------------------------+
630| name | 16 | char[] | Name of console |
631+-----------+--------+---------------+----------------------------------------+
632| clk_in_hz | 24 | uint64_t | UART clock (in hz) for console |
633+-----------+--------+---------------+----------------------------------------+
634| baud_rate | 32 | uint64_t | Baud rate |
635+-----------+--------+---------------+----------------------------------------+
636| flags | 40 | uint64_t | Additional flags (RES0) |
637+-----------+--------+---------------+----------------------------------------+
Javier Almansa Sobrino37bf69c2022-04-07 18:26:49 +0100638