Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 1 | # |
Bjorn Engstrom | 74c5f87 | 2022-08-26 09:45:45 +0200 | [diff] [blame] | 2 | # Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved. |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 3 | # |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | # SPDX-License-Identifier: BSD-3-Clause |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 5 | # |
| 6 | |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 7 | include common/fdt_wrappers.mk |
| 8 | |
Alexei Fedorov | caa1802 | 2020-07-14 10:47:25 +0100 | [diff] [blame] | 9 | # Include GICv2 driver files |
| 10 | include drivers/arm/gic/v2/gicv2.mk |
| 11 | |
| 12 | JUNO_GIC_SOURCES := ${GICV2_SOURCES} \ |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 13 | plat/common/plat_gicv2.c \ |
| 14 | plat/arm/common/arm_gicv2.c |
| 15 | |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 16 | JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \ |
| 17 | plat/arm/common/arm_cci.c |
| 18 | |
Soby Mathew | 9c708b5 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 19 | JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 20 | plat/arm/board/juno/juno_security.c \ |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 21 | plat/arm/board/juno/juno_trng.c \ |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 22 | plat/arm/common/arm_tzc400.c |
| 23 | |
dp-arm | b3263b3 | 2017-02-28 14:43:15 +0000 | [diff] [blame] | 24 | ifneq (${ENABLE_STACK_PROTECTOR}, 0) |
| 25 | JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c |
| 26 | endif |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 27 | |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 28 | # Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the |
| 29 | # SCP during power management operations and for SCP RAM Firmware transfer. |
| 30 | CSS_USE_SCMI_SDS_DRIVER := 1 |
| 31 | |
Antonio Nino Diaz | 09d5876 | 2019-01-23 19:06:55 +0000 | [diff] [blame] | 32 | PLAT_INCLUDES := -Iplat/arm/board/juno/include |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 33 | |
Antonio Nino Diaz | cbc6826 | 2018-10-10 11:02:34 +0100 | [diff] [blame] | 34 | PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \ |
| 35 | plat/arm/board/juno/juno_common.c |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 36 | |
Yatharth Kochar | ede39cb | 2016-11-14 12:01:04 +0000 | [diff] [blame] | 37 | # Flag to enable support for AArch32 state on JUNO |
| 38 | JUNO_AARCH32_EL3_RUNTIME := 0 |
| 39 | $(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME)) |
| 40 | $(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME)) |
| 41 | |
Summer Qin | 13b95c2 | 2018-03-02 15:51:14 +0800 | [diff] [blame] | 42 | # Flag to enable support for TZMP1 on JUNO |
| 43 | JUNO_TZMP1 := 0 |
| 44 | $(eval $(call assert_boolean,JUNO_TZMP1)) |
| 45 | ifeq (${JUNO_TZMP1}, 1) |
Bjorn Engstrom | 74c5f87 | 2022-08-26 09:45:45 +0200 | [diff] [blame] | 46 | ifeq (${ARM_ETHOSN_NPU_TZMP1},1) |
| 47 | $(error JUNO_TZMP1 cannot be used together with ARM_ETHOSN_NPU_TZMP1) |
| 48 | else |
| 49 | $(eval $(call add_define,JUNO_TZMP1)) |
| 50 | endif |
Summer Qin | 13b95c2 | 2018-03-02 15:51:14 +0800 | [diff] [blame] | 51 | endif |
| 52 | |
Andre Przywara | 31ed470 | 2020-10-08 00:45:22 +0100 | [diff] [blame] | 53 | TRNG_SUPPORT := 1 |
| 54 | |
Soby Mathew | bf16923 | 2017-11-14 14:10:10 +0000 | [diff] [blame] | 55 | ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1) |
| 56 | # Include BL32 in FIP |
| 57 | NEED_BL32 := yes |
| 58 | # BL31 is not required |
| 59 | override BL31_SOURCES = |
| 60 | |
| 61 | # The BL32 needs to be built separately invoking the AARCH32 compiler and |
| 62 | # be specifed via `BL32` build option. |
| 63 | ifneq (${ARCH}, aarch32) |
| 64 | override BL32_SOURCES = |
| 65 | endif |
| 66 | endif |
| 67 | |
Yatharth Kochar | ede39cb | 2016-11-14 12:01:04 +0000 | [diff] [blame] | 68 | ifeq (${ARCH},aarch64) |
Dan Handley | 7bef800 | 2015-03-19 19:22:44 +0000 | [diff] [blame] | 69 | BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \ |
Brendan Jackman | a443d22 | 2015-10-30 16:25:12 +0000 | [diff] [blame] | 70 | lib/cpus/aarch64/cortex_a57.S \ |
Juan Castillo | b6132f1 | 2015-10-06 14:01:35 +0100 | [diff] [blame] | 71 | lib/cpus/aarch64/cortex_a72.S \ |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 72 | plat/arm/board/juno/juno_err.c \ |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 73 | plat/arm/board/juno/juno_bl1_setup.c \ |
Aditya Angadi | 20b4841 | 2019-04-16 11:29:14 +0530 | [diff] [blame] | 74 | drivers/arm/sp805/sp805.c \ |
dp-arm | b3263b3 | 2017-02-28 14:43:15 +0000 | [diff] [blame] | 75 | ${JUNO_INTERCONNECT_SOURCES} \ |
| 76 | ${JUNO_SECURITY_SOURCES} |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 77 | |
Ambroise Vincent | fa42c9e | 2019-07-04 14:58:45 +0100 | [diff] [blame] | 78 | BL2_SOURCES += drivers/arm/sp805/sp805.c \ |
| 79 | lib/utils/mem_region.c \ |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 80 | plat/arm/board/juno/juno_err.c \ |
Roberto Vargas | b96ee4b | 2018-08-06 13:35:31 +0100 | [diff] [blame] | 81 | plat/arm/board/juno/juno_bl2_setup.c \ |
| 82 | plat/arm/common/arm_nor_psci_mem_protect.c \ |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 83 | ${JUNO_SECURITY_SOURCES} |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 84 | |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 85 | BL2U_SOURCES += ${JUNO_SECURITY_SOURCES} |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 86 | |
Antonio Nino Diaz | d7da2f8 | 2018-10-10 11:14:44 +0100 | [diff] [blame] | 87 | BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \ |
| 88 | lib/cpus/aarch64/cortex_a53.S \ |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 89 | lib/cpus/aarch64/cortex_a57.S \ |
Brendan Jackman | a443d22 | 2015-10-30 16:25:12 +0000 | [diff] [blame] | 90 | lib/cpus/aarch64/cortex_a72.S \ |
Roberto Vargas | b96ee4b | 2018-08-06 13:35:31 +0100 | [diff] [blame] | 91 | lib/utils/mem_region.c \ |
Mikael Olsson | 0232da2 | 2021-02-12 17:30:16 +0100 | [diff] [blame] | 92 | lib/fconf/fconf.c \ |
| 93 | lib/fconf/fconf_dyn_cfg_getter.c \ |
| 94 | plat/arm/board/juno/juno_bl31_setup.c \ |
Chandni Cherukuri | e4bf6a0 | 2018-11-14 13:43:59 +0530 | [diff] [blame] | 95 | plat/arm/board/juno/juno_pm.c \ |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 96 | plat/arm/board/juno/juno_topology.c \ |
Roberto Vargas | b96ee4b | 2018-08-06 13:35:31 +0100 | [diff] [blame] | 97 | plat/arm/common/arm_nor_psci_mem_protect.c \ |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 98 | ${JUNO_GIC_SOURCES} \ |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 99 | ${JUNO_INTERCONNECT_SOURCES} \ |
Vikram Kanigiri | 70752bb | 2016-02-10 14:50:53 +0000 | [diff] [blame] | 100 | ${JUNO_SECURITY_SOURCES} |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 101 | |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 102 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
| 103 | |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 104 | ifeq (${CSS_USE_SCMI_SDS_DRIVER},1) |
Antonio Nino Diaz | 09d5876 | 2019-01-23 19:06:55 +0000 | [diff] [blame] | 105 | BL1_SOURCES += drivers/arm/css/sds/sds.c |
Yatharth Kochar | ede39cb | 2016-11-14 12:01:04 +0000 | [diff] [blame] | 106 | endif |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 107 | |
Max Shvetsov | 06dba29 | 2019-12-06 11:50:12 +0000 | [diff] [blame] | 108 | ifeq (${TRUSTED_BOARD_BOOT}, 1) |
Rob Hughes | 9a2177a | 2023-01-17 16:10:26 +0000 | [diff] [blame] | 109 | # Enable Juno specific TBBR images |
| 110 | $(eval $(call add_define,PLAT_TBBR_IMG_DEF)) |
| 111 | DTC_CPPFLAGS += ${PLAT_INCLUDES} |
| 112 | |
| 113 | BL1_SOURCES += plat/arm/board/juno/juno_trusted_boot.c |
| 114 | BL2_SOURCES += plat/arm/board/juno/juno_trusted_boot.c |
| 115 | |
| 116 | ifeq (${COT_DESC_IN_DTB},0) |
| 117 | BL2_SOURCES += plat/arm/board/juno/juno_tbbr_cot_bl2.c |
| 118 | endif |
Max Shvetsov | 06dba29 | 2019-12-06 11:50:12 +0000 | [diff] [blame] | 119 | endif |
| 120 | |
Sathees Balya | 2257607 | 2018-09-03 17:41:13 +0100 | [diff] [blame] | 121 | endif |
| 122 | |
Deepak Pandey | b0971f9 | 2018-05-25 12:43:30 +0530 | [diff] [blame] | 123 | ifneq (${RESET_TO_BL31},0) |
Sandrine Bailleux | 1e32d32 | 2019-01-07 15:35:37 +0100 | [diff] [blame] | 124 | $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \ |
Deepak Pandey | b0971f9 | 2018-05-25 12:43:30 +0530 | [diff] [blame] | 125 | Please set RESET_TO_BL31 to 0.") |
| 126 | endif |
| 127 | |
Sathees Balya | 6f07a60 | 2018-11-02 14:56:06 +0000 | [diff] [blame] | 128 | ifeq ($(USE_ROMLIB),1) |
| 129 | all : bl1_romlib.bin |
| 130 | endif |
| 131 | |
Zelalem | 15f378d | 2021-02-02 09:49:07 -0600 | [diff] [blame] | 132 | bl1_romlib.bin : $(BUILD_PLAT)/bl1.bin romlib.bin |
Sathees Balya | 6f07a60 | 2018-11-02 14:56:06 +0000 | [diff] [blame] | 133 | @echo "Building combined BL1 and ROMLIB binary for Juno $@" |
| 134 | ./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT) |
| 135 | |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 136 | # Errata workarounds for Cortex-A53: |
Ambroise Vincent | bde4246 | 2019-02-22 14:19:16 +0000 | [diff] [blame] | 137 | ERRATA_A53_819472 := 1 |
| 138 | ERRATA_A53_824069 := 1 |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 139 | ERRATA_A53_826319 := 1 |
Ambroise Vincent | bde4246 | 2019-02-22 14:19:16 +0000 | [diff] [blame] | 140 | ERRATA_A53_827319 := 1 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 141 | ERRATA_A53_835769 := 1 |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 142 | ERRATA_A53_836870 := 1 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 143 | ERRATA_A53_843419 := 1 |
Andre Przywara | 00eefd9 | 2016-10-06 16:54:53 +0100 | [diff] [blame] | 144 | ERRATA_A53_855873 := 1 |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 145 | |
| 146 | # Errata workarounds for Cortex-A57: |
Vikram Kanigiri | eade34c | 2016-01-20 15:57:35 +0000 | [diff] [blame] | 147 | ERRATA_A57_806969 := 0 |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 148 | ERRATA_A57_813419 := 1 |
Vikram Kanigiri | eade34c | 2016-01-20 15:57:35 +0000 | [diff] [blame] | 149 | ERRATA_A57_813420 := 1 |
Ambroise Vincent | bde4246 | 2019-02-22 14:19:16 +0000 | [diff] [blame] | 150 | ERRATA_A57_814670 := 1 |
| 151 | ERRATA_A57_817169 := 1 |
Douglas Raillard | 71d4fe2 | 2017-02-28 17:56:15 +0000 | [diff] [blame] | 152 | ERRATA_A57_826974 := 1 |
| 153 | ERRATA_A57_826977 := 1 |
| 154 | ERRATA_A57_828024 := 1 |
| 155 | ERRATA_A57_829520 := 1 |
| 156 | ERRATA_A57_833471 := 1 |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 157 | ERRATA_A57_859972 := 0 |
Douglas Raillard | 71d4fe2 | 2017-02-28 17:56:15 +0000 | [diff] [blame] | 158 | |
Eleanor Bonnici | 8392aab | 2017-08-04 15:03:51 +0100 | [diff] [blame] | 159 | # Errata workarounds for Cortex-A72: |
| 160 | ERRATA_A72_859971 := 0 |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 161 | |
| 162 | # Enable option to skip L1 data cache flush during the Cortex-A57 cluster |
| 163 | # power down sequence |
| 164 | SKIP_A57_L1_FLUSH_PWR_DWN := 1 |
Dan Handley | 7bef800 | 2015-03-19 19:22:44 +0000 | [diff] [blame] | 165 | |
David Cunado | c5b0c0f | 2017-10-31 23:19:21 +0000 | [diff] [blame] | 166 | # Do not enable SVE |
| 167 | ENABLE_SVE_FOR_NS := 0 |
| 168 | |
Antonio Nino Diaz | 4e6408c | 2019-01-23 16:23:07 +0000 | [diff] [blame] | 169 | # Enable the dynamic translation tables library. |
| 170 | ifeq (${ARCH},aarch32) |
| 171 | ifeq (${RESET_TO_SP_MIN},1) |
Masahiro Yamada | 1adc5f5 | 2020-04-01 14:28:24 +0900 | [diff] [blame] | 172 | BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC |
Antonio Nino Diaz | 4e6408c | 2019-01-23 16:23:07 +0000 | [diff] [blame] | 173 | endif |
| 174 | else |
| 175 | ifeq (${RESET_TO_BL31},1) |
Masahiro Yamada | 1adc5f5 | 2020-04-01 14:28:24 +0900 | [diff] [blame] | 176 | BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC |
Antonio Nino Diaz | 4e6408c | 2019-01-23 16:23:07 +0000 | [diff] [blame] | 177 | endif |
| 178 | endif |
| 179 | |
Petre-Ionut Tudor | e5a6fef | 2019-11-07 15:18:03 +0000 | [diff] [blame] | 180 | ifeq (${ALLOW_RO_XLAT_TABLES}, 1) |
| 181 | ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1) |
Masahiro Yamada | 1adc5f5 | 2020-04-01 14:28:24 +0900 | [diff] [blame] | 182 | BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES |
Petre-Ionut Tudor | e5a6fef | 2019-11-07 15:18:03 +0000 | [diff] [blame] | 183 | else |
Masahiro Yamada | 1adc5f5 | 2020-04-01 14:28:24 +0900 | [diff] [blame] | 184 | BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES |
Petre-Ionut Tudor | e5a6fef | 2019-11-07 15:18:03 +0000 | [diff] [blame] | 185 | endif |
| 186 | endif |
| 187 | |
Andre Przywara | c7d10e3 | 2020-10-16 12:06:57 +0100 | [diff] [blame] | 188 | BL1_CPPFLAGS += -march=armv8-a+crc |
| 189 | BL2_CPPFLAGS += -march=armv8-a+crc |
| 190 | BL2U_CPPFLAGS += -march=armv8-a+crc |
| 191 | BL31_CPPFLAGS += -march=armv8-a+crc |
| 192 | BL32_CPPFLAGS += -march=armv8-a+crc |
| 193 | |
Louis Mayencourt | 65cac46 | 2019-07-29 10:40:17 +0100 | [diff] [blame] | 194 | # Add the FDT_SOURCES and options for Dynamic Config |
Manish V Badarkhe | 64616a5 | 2020-05-31 08:53:40 +0100 | [diff] [blame] | 195 | FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \ |
Mikael Olsson | 0232da2 | 2021-02-12 17:30:16 +0100 | [diff] [blame] | 196 | plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \ |
| 197 | fdts/${PLAT}.dts |
Manish V Badarkhe | 64616a5 | 2020-05-31 08:53:40 +0100 | [diff] [blame] | 198 | |
| 199 | FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb |
| 200 | TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb |
Mikael Olsson | 0232da2 | 2021-02-12 17:30:16 +0100 | [diff] [blame] | 201 | HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb |
Louis Mayencourt | 65cac46 | 2019-07-29 10:40:17 +0100 | [diff] [blame] | 202 | |
Manish V Badarkhe | 64616a5 | 2020-05-31 08:53:40 +0100 | [diff] [blame] | 203 | # Add the FW_CONFIG to FIP and specify the same to certtool |
Anders Dellien | 3f69474 | 2020-08-23 19:32:48 +0100 | [diff] [blame] | 204 | $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) |
Louis Mayencourt | 65cac46 | 2019-07-29 10:40:17 +0100 | [diff] [blame] | 205 | # Add the TB_FW_CONFIG to FIP and specify the same to certtool |
Anders Dellien | 3f69474 | 2020-08-23 19:32:48 +0100 | [diff] [blame] | 206 | $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) |
Mikael Olsson | 0232da2 | 2021-02-12 17:30:16 +0100 | [diff] [blame] | 207 | # Add the HW_CONFIG to FIP and specify the same to certtool |
| 208 | $(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG})) |
Louis Mayencourt | 65cac46 | 2019-07-29 10:40:17 +0100 | [diff] [blame] | 209 | |
Antonio Nino Diaz | cbc6826 | 2018-10-10 11:02:34 +0100 | [diff] [blame] | 210 | include plat/arm/board/common/board_common.mk |
Dan Handley | 7bef800 | 2015-03-19 19:22:44 +0000 | [diff] [blame] | 211 | include plat/arm/common/arm_common.mk |
| 212 | include plat/arm/soc/common/soc_css.mk |
| 213 | include plat/arm/css/common/css_common.mk |