| developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame^] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 5 | */ |
| 6 | #include <arch.h> |
| 7 | #include <asm_macros.S> |
| 8 | #include <platform_def.h> |
| 9 | |
| 10 | .globl plat_secondary_cold_boot_setup |
| 11 | .globl plat_report_exception |
| 12 | .globl platform_is_primary_cpu |
| 13 | .globl plat_crash_console_init |
| 14 | .globl plat_crash_console_putc |
| 15 | .globl platform_mem_init |
| 16 | |
| 17 | |
| 18 | .macro crash_ram_log |
| 19 | /* |
| 20 | * Check teearg->atf_log_buf_size. |
| 21 | * Exit if atf_log_buf_size equals 0 |
| 22 | */ |
| 23 | adr x2, ptr_atf_crash_flag |
| 24 | ldr x2, [x2] |
| 25 | /* exit if ptr_atf_crash_flag equals NULL */ |
| 26 | cbz x2, exit_putc |
| 27 | |
| 28 | /* |
| 29 | * set atf crash magic number |
| 30 | */ |
| 31 | 1: |
| 32 | adr x2, ptr_atf_crash_flag |
| 33 | ldr x2, [x2] |
| 34 | mov_imm x1, 0xdead1abf |
| 35 | /* p_atf_log_ctrl->atf_crash_flag = 0xdead1abf */ |
| 36 | str w1, [x2] |
| 37 | /* can't use w3 return addr, w4, start of buffer addr */ |
| 38 | ldr w2, [x2] |
| 39 | cmp w2, w1 |
| 40 | b.ne 1b |
| 41 | |
| 42 | /* |
| 43 | * get cpu id |
| 44 | */ |
| 45 | mrs x1, mpidr_el1 |
| 46 | /* refer to platform_get_core_pos */ |
| 47 | and x2, x1, #MPIDR_CPU_MASK |
| 48 | and x1, x1, #MPIDR_CLUSTER_MASK |
| 49 | /* x1 = cpu id (cpu id = aff0 + aff1*4 ) */ |
| 50 | add x1, x2, x1, LSR #6 |
| 51 | |
| 52 | adr x2, ptr_atf_except_write_pos_per_cpu |
| 53 | ldr x2, [x2] |
| 54 | /* |
| 55 | * plus (cpu_id * 8)--> |
| 56 | * &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] |
| 57 | * x2 = &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]; |
| 58 | */ |
| 59 | add x2, x2, x1, LSL # 3 |
| 60 | /* log write */ |
| 61 | /* w1 = p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] */ |
| 62 | ldr x1, [x2] |
| 63 | /* *x1 = w0--> |
| 64 | * *(p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]) = c) |
| 65 | */ |
| 66 | strb w0, [x1] |
| 67 | /* w1++ */ |
| 68 | add x1, x1, #1 |
| 69 | /* p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] = w1 */ |
| 70 | str x1, [x2] |
| 71 | exit_putc: |
| 72 | .endm |
| 73 | |
| 74 | /* ----------------------------------------------------- |
| 75 | * void plat_secondary_cold_boot_setup (void); |
| 76 | * |
| 77 | * This function performs any platform specific actions |
| 78 | * needed for a secondary cpu after a cold reset e.g |
| 79 | * mark the cpu's presence, mechanism to place it in a |
| 80 | * holding pen etc. |
| 81 | * ----------------------------------------------------- |
| 82 | */ |
| 83 | func plat_secondary_cold_boot_setup |
| 84 | /* Do not do cold boot for secondary CPU */ |
| 85 | cb_panic: |
| 86 | b cb_panic |
| 87 | endfunc plat_secondary_cold_boot_setup |
| 88 | |
| 89 | func platform_is_primary_cpu |
| 90 | and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
| 91 | cmp x0, #PLAT_PRIMARY_CPU |
| 92 | cset x0, eq |
| 93 | ret |
| 94 | endfunc platform_is_primary_cpu |
| 95 | |
| 96 | /* --------------------------------------------- |
| 97 | * int plat_crash_console_init(void) |
| 98 | * Function to initialize the crash console |
| 99 | * without a C Runtime to print crash report. |
| 100 | * Clobber list : x0, x1, x2 |
| 101 | * --------------------------------------------- |
| 102 | */ |
| 103 | func plat_crash_console_init |
| 104 | mov_imm x0, UART0_BASE |
| 105 | mov_imm x1, UART_CLOCK |
| 106 | mov_imm x2, UART_BAUDRATE |
| 107 | b console_init |
| 108 | ret |
| 109 | endfunc plat_crash_console_init |
| 110 | |
| 111 | /* --------------------------------------------- |
| 112 | * int plat_crash_console_putc(void) |
| 113 | * Function to print a character on the crash |
| 114 | * console without a C Runtime. |
| 115 | * Clobber list : x1, x2 |
| 116 | * --------------------------------------------- |
| 117 | */ |
| 118 | func plat_crash_console_putc |
| 119 | mov_imm x1, UART0_BASE |
| 120 | b console_core_putc |
| 121 | ret |
| 122 | endfunc plat_crash_console_putc |
| 123 | |
| 124 | /* -------------------------------------------------------- |
| 125 | * void platform_mem_init (void); |
| 126 | * |
| 127 | * Any memory init, relocation to be done before the |
| 128 | * platform boots. Called very early in the boot process. |
| 129 | * -------------------------------------------------------- |
| 130 | */ |
| 131 | func platform_mem_init |
| 132 | ret |
| 133 | endfunc platform_mem_init |
| 134 | |