Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | 9f2f8ef | 2018-02-19 16:27:06 +0000 | [diff] [blame] | 2 | * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 7 | #include <asm_macros.S> |
Achin Gupta | f6b9e99 | 2014-07-31 11:19:11 +0100 | [diff] [blame] | 8 | #include <assert_macros.S> |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 9 | #include <platform_def.h> |
Achin Gupta | f6b9e99 | 2014-07-31 11:19:11 +0100 | [diff] [blame] | 10 | #include <psci.h> |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 11 | |
| 12 | .globl psci_do_pwrdown_cache_maintenance |
| 13 | .globl psci_do_pwrup_cache_maintenance |
Soby Mathew | d019487 | 2016-04-29 19:01:30 +0100 | [diff] [blame] | 14 | .globl psci_power_down_wfi |
| 15 | #if !ERROR_DEPRECATED |
| 16 | .globl psci_entrypoint |
| 17 | #endif |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 18 | |
| 19 | /* ----------------------------------------------------------------------- |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 20 | * void psci_do_pwrdown_cache_maintenance(unsigned int power level); |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 21 | * |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 22 | * This function performs cache maintenance for the specified power |
| 23 | * level. The levels of cache affected are determined by the power |
| 24 | * level which is passed as the argument i.e. level 0 results |
| 25 | * in a flush of the L1 cache. Both the L1 and L2 caches are flushed |
| 26 | * for a higher power level. |
Achin Gupta | f6b9e99 | 2014-07-31 11:19:11 +0100 | [diff] [blame] | 27 | * |
| 28 | * Additionally, this function also ensures that stack memory is correctly |
| 29 | * flushed out to avoid coherency issues due to a change in its memory |
| 30 | * attributes after the data cache is disabled. |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 31 | * ----------------------------------------------------------------------- |
| 32 | */ |
| 33 | func psci_do_pwrdown_cache_maintenance |
| 34 | stp x29, x30, [sp,#-16]! |
| 35 | stp x19, x20, [sp,#-16]! |
| 36 | |
| 37 | /* --------------------------------------------- |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 38 | * Invoke CPU-specific power down operations for |
| 39 | * the appropriate level |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 40 | * --------------------------------------------- |
| 41 | */ |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 42 | bl prepare_cpu_pwr_dwn |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 43 | |
| 44 | /* --------------------------------------------- |
| 45 | * Do stack maintenance by flushing the used |
| 46 | * stack to the main memory and invalidating the |
| 47 | * remainder. |
| 48 | * --------------------------------------------- |
| 49 | */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 50 | bl plat_get_my_stack |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 51 | |
| 52 | /* --------------------------------------------- |
| 53 | * Calculate and store the size of the used |
| 54 | * stack memory in x1. |
| 55 | * --------------------------------------------- |
| 56 | */ |
| 57 | mov x19, x0 |
| 58 | mov x1, sp |
| 59 | sub x1, x0, x1 |
| 60 | mov x0, sp |
| 61 | bl flush_dcache_range |
| 62 | |
| 63 | /* --------------------------------------------- |
| 64 | * Calculate and store the size of the unused |
| 65 | * stack memory in x1. Calculate and store the |
| 66 | * stack base address in x0. |
| 67 | * --------------------------------------------- |
| 68 | */ |
| 69 | sub x0, x19, #PLATFORM_STACK_SIZE |
| 70 | sub x1, sp, x0 |
| 71 | bl inv_dcache_range |
| 72 | |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 73 | ldp x19, x20, [sp], #16 |
| 74 | ldp x29, x30, [sp], #16 |
| 75 | ret |
Kévin Petit | a877c25 | 2015-03-24 14:03:57 +0000 | [diff] [blame] | 76 | endfunc psci_do_pwrdown_cache_maintenance |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 77 | |
| 78 | |
| 79 | /* ----------------------------------------------------------------------- |
| 80 | * void psci_do_pwrup_cache_maintenance(void); |
| 81 | * |
| 82 | * This function performs cache maintenance after this cpu is powered up. |
| 83 | * Currently, this involves managing the used stack memory before turning |
| 84 | * on the data cache. |
| 85 | * ----------------------------------------------------------------------- |
| 86 | */ |
| 87 | func psci_do_pwrup_cache_maintenance |
| 88 | stp x29, x30, [sp,#-16]! |
| 89 | |
| 90 | /* --------------------------------------------- |
| 91 | * Ensure any inflight stack writes have made it |
| 92 | * to main memory. |
| 93 | * --------------------------------------------- |
| 94 | */ |
| 95 | dmb st |
| 96 | |
| 97 | /* --------------------------------------------- |
| 98 | * Calculate and store the size of the used |
| 99 | * stack memory in x1. Calculate and store the |
| 100 | * stack base address in x0. |
| 101 | * --------------------------------------------- |
| 102 | */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 103 | bl plat_get_my_stack |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 104 | mov x1, sp |
| 105 | sub x1, x0, x1 |
| 106 | mov x0, sp |
| 107 | bl inv_dcache_range |
| 108 | |
| 109 | /* --------------------------------------------- |
| 110 | * Enable the data cache. |
| 111 | * --------------------------------------------- |
| 112 | */ |
| 113 | mrs x0, sctlr_el3 |
| 114 | orr x0, x0, #SCTLR_C_BIT |
| 115 | msr sctlr_el3, x0 |
| 116 | isb |
| 117 | |
| 118 | ldp x29, x30, [sp], #16 |
| 119 | ret |
Kévin Petit | a877c25 | 2015-03-24 14:03:57 +0000 | [diff] [blame] | 120 | endfunc psci_do_pwrup_cache_maintenance |
Soby Mathew | d019487 | 2016-04-29 19:01:30 +0100 | [diff] [blame] | 121 | |
| 122 | /* ----------------------------------------------------------------------- |
| 123 | * void psci_power_down_wfi(void); |
| 124 | * This function is called to indicate to the power controller that it |
| 125 | * is safe to power down this cpu. It should not exit the wfi and will |
| 126 | * be released from reset upon power up. |
| 127 | * ----------------------------------------------------------------------- |
| 128 | */ |
| 129 | func psci_power_down_wfi |
| 130 | dsb sy // ensure write buffer empty |
| 131 | wfi |
Jeenu Viswambharan | 68aef10 | 2016-11-30 15:21:11 +0000 | [diff] [blame] | 132 | no_ret plat_panic_handler |
Soby Mathew | d019487 | 2016-04-29 19:01:30 +0100 | [diff] [blame] | 133 | endfunc psci_power_down_wfi |
| 134 | |
| 135 | /* ----------------------------------------------------------------------- |
| 136 | * void psci_entrypoint(void); |
| 137 | * The deprecated entry point for PSCI on warm boot for AArch64. |
| 138 | * ----------------------------------------------------------------------- |
| 139 | */ |
| 140 | func_deprecated psci_entrypoint |
| 141 | b bl31_warm_entrypoint |
| 142 | endfunc_deprecated psci_entrypoint |