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git01.mediatek.com / filogic / atf / f3c0fe1ef93b93a4a550a4a521da19d50937aacb / . / plat / arm / common / aarch64 / arm_helpers.S
blob: 3e56691cbbe7320da6d96cb3cab476c5b398285b [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]1/*
Jimmy Brisson39f9eee2020-08-05 13:44:05 -0500[diff] [blame]2 * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]3 *
dp-armfa3cf0b2017-05-03 09:38:09 +0100[diff] [blame]4 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]5 */
6#include <asm_macros.S>
7#include <platform_def.h>
8
Soby Mathewfec4eb72015-07-01 16:16:20 +0100[diff] [blame]9 .weak plat_arm_calc_core_pos
10 .weak plat_my_core_pos
Antonio Nino Diaze55e85f2018-10-16 14:10:15 +0100[diff] [blame]11 .globl plat_crash_console_init
12 .globl plat_crash_console_putc
13 .globl plat_crash_console_flush
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +0100[diff] [blame]14 .globl platform_mem_init
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]15
Soby Mathewfec4eb72015-07-01 16:16:20 +0100[diff] [blame]16
17 /* -----------------------------------------------------
18 * unsigned int plat_my_core_pos(void)
19 * This function uses the plat_arm_calc_core_pos()
20 * definition to get the index of the calling CPU.
21 * -----------------------------------------------------
22 */
23func plat_my_core_pos
24 mrs x0, mpidr_el1
25 b plat_arm_calc_core_pos
26endfunc plat_my_core_pos
27
28 /* -----------------------------------------------------
Soby Mathewa0fedc42016-06-16 14:52:04 +0100[diff] [blame]29 * unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
Soby Mathewfec4eb72015-07-01 16:16:20 +0100[diff] [blame]30 * Helper function to calculate the core position.
31 * With this function: CorePos = (ClusterId * 4) +
32 * CoreId
33 * -----------------------------------------------------
34 */
35func plat_arm_calc_core_pos
36 and x1, x0, #MPIDR_CPU_MASK
37 and x0, x0, #MPIDR_CLUSTER_MASK
38 add x0, x1, x0, LSR #6
39 ret
40endfunc plat_arm_calc_core_pos
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]41
42 /* ---------------------------------------------
43 * int plat_crash_console_init(void)
44 * Function to initialize the crash console
45 * without a C Runtime to print crash report.
Juan Castilloe7ae6db2015-11-26 14:52:15 +0000[diff] [blame]46 * Clobber list : x0 - x4
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]47 * ---------------------------------------------
48 */
49func plat_crash_console_init
50 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
51 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
52 mov_imm x2, ARM_CONSOLE_BAUDRATE
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100[diff] [blame]53 b console_pl011_core_init
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]54endfunc plat_crash_console_init
55
56 /* ---------------------------------------------
57 * int plat_crash_console_putc(int c)
58 * Function to print a character on the crash
59 * console without a C Runtime.
60 * Clobber list : x1, x2
61 * ---------------------------------------------
62 */
63func plat_crash_console_putc
64 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100[diff] [blame]65 b console_pl011_core_putc
Dan Handley9df48042015-03-19 18:58:55 +0000[diff] [blame]66endfunc plat_crash_console_putc
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +0100[diff] [blame]67
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000[diff] [blame]68 /* ---------------------------------------------
Jimmy Brisson39f9eee2020-08-05 13:44:05 -0500[diff] [blame]69 * void plat_crash_console_flush()
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000[diff] [blame]70 * Function to force a write of all buffered
71 * data that hasn't been output.
Jimmy Brisson39f9eee2020-08-05 13:44:05 -0500[diff] [blame]72 * Out : void.
Jeenu Viswambharan46343c02018-01-25 12:49:57 +0000[diff] [blame]73 * Clobber list : r0
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000[diff] [blame]74 * ---------------------------------------------
75 */
76func plat_crash_console_flush
Jeenu Viswambharan46343c02018-01-25 12:49:57 +0000[diff] [blame]77 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100[diff] [blame]78 b console_pl011_core_flush
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000[diff] [blame]79endfunc plat_crash_console_flush
80
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +0100[diff] [blame]81 /* ---------------------------------------------------------------------
82 * We don't need to carry out any memory initialization on ARM
83 * platforms. The Secure RAM is accessible straight away.
84 * ---------------------------------------------------------------------
85 */
86func platform_mem_init
87 ret
88endfunc platform_mem_init