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Sandrine Bailleux798140d2014-07-17 16:06:39 +01001/*
Antonio Nino Diaz6f3ccc52018-07-20 09:17:26 +01002 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
Sandrine Bailleux798140d2014-07-17 16:06:39 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Sandrine Bailleux798140d2014-07-17 16:06:39 +01005 */
6
Antonio Nino Diaz6f3ccc52018-07-20 09:17:26 +01007#ifndef JUNO_DEF_H
8#define JUNO_DEF_H
Sandrine Bailleux798140d2014-07-17 16:06:39 +01009
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/utils_def.h>
Sandrine Bailleux798140d2014-07-17 16:06:39 +010011
Sandrine Bailleux798140d2014-07-17 16:06:39 +010012/*******************************************************************************
13 * Juno memory map related constants
14 ******************************************************************************/
Sandrine Bailleuxfd8f8982015-02-04 14:06:10 +000015
16/* Board revisions */
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000017#define REV_JUNO_R0 U(0x1) /* Rev B */
18#define REV_JUNO_R1 U(0x2) /* Rev C */
19#define REV_JUNO_R2 U(0x3) /* Rev D */
Sandrine Bailleux798140d2014-07-17 16:06:39 +010020
Dan Handley7bef8002015-03-19 19:22:44 +000021/* Bypass offset from start of NOR flash */
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000022#define BL1_ROM_BYPASS_OFFSET UL(0x03EC0000)
Sandrine Bailleux798140d2014-07-17 16:06:39 +010023
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000024#define EMMC_BASE UL(0x0c000000)
25#define EMMC_SIZE UL(0x04000000)
Sandrine Bailleux798140d2014-07-17 16:06:39 +010026
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000027#define PSRAM_BASE UL(0x14000000)
28#define PSRAM_SIZE UL(0x02000000)
Sandrine Bailleux798140d2014-07-17 16:06:39 +010029
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000030#define JUNO_SSC_VER_PART_NUM U(0x030)
Sandrine Bailleux798140d2014-07-17 16:06:39 +010031
32/*******************************************************************************
Soby Mathew47e43f22016-02-01 14:04:34 +000033 * Juno topology related constants
34 ******************************************************************************/
35#define JUNO_CLUSTER_COUNT 2
36#define JUNO_CLUSTER0_CORE_COUNT 2
37#define JUNO_CLUSTER1_CORE_COUNT 4
38
39/*******************************************************************************
Sandrine Bailleux798140d2014-07-17 16:06:39 +010040 * TZC-400 related constants
41 ******************************************************************************/
Dan Handley7bef8002015-03-19 19:22:44 +000042#define TZC400_NSAID_CCI400 0 /* Note: Same as default NSAID!! */
43#define TZC400_NSAID_PCIE 1
44#define TZC400_NSAID_HDLCD0 2
45#define TZC400_NSAID_HDLCD1 3
46#define TZC400_NSAID_USB 4
47#define TZC400_NSAID_DMA330 5
48#define TZC400_NSAID_THINLINKS 6
49#define TZC400_NSAID_AP 9
50#define TZC400_NSAID_GPU 10
51#define TZC400_NSAID_SCP 11
52#define TZC400_NSAID_CORESIGHT 12
Sandrine Bailleux798140d2014-07-17 16:06:39 +010053
Juan Castillo21b04192014-08-12 17:24:30 +010054/*******************************************************************************
dp-arm8f59e152017-02-27 12:21:43 +000055 * TRNG related constants
56 ******************************************************************************/
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000057#define TRNG_BASE UL(0x7FE60000)
dp-arm8f59e152017-02-27 12:21:43 +000058#define TRNG_NOUTPUTS 4
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000059#define TRNG_STATUS UL(0x10)
60#define TRNG_INTMASK UL(0x14)
61#define TRNG_CONFIG UL(0x18)
62#define TRNG_CONTROL UL(0x1C)
dp-armb3263b32017-02-28 14:43:15 +000063#define TRNG_NBYTES 16 /* Number of bytes generated per round. */
dp-arm8f59e152017-02-27 12:21:43 +000064
65/*******************************************************************************
Robin Murphy0f1d6662015-01-09 14:30:58 +000066 * MMU-401 related constants
67 ******************************************************************************/
Antonio Nino Diazab5d2b12018-10-30 16:12:32 +000068#define MMU401_SSD_OFFSET UL(0x4000)
69#define MMU401_DMA330_BASE UL(0x7fb00000)
Dan Handley7bef8002015-03-19 19:22:44 +000070
Vikram Kanigirif3bcea22015-06-24 17:51:09 +010071/*******************************************************************************
72 * Interrupt handling constants
73 ******************************************************************************/
74#define JUNO_IRQ_DMA_SMMU 126
75#define JUNO_IRQ_HDLCD0_SMMU 128
76#define JUNO_IRQ_HDLCD1_SMMU 130
77#define JUNO_IRQ_USB_SMMU 132
78#define JUNO_IRQ_THIN_LINKS_SMMU 134
79#define JUNO_IRQ_SEC_I2C 137
80#define JUNO_IRQ_GPU_SMMU_1 73
81#define JUNO_IRQ_ETR_SMMU 75
Robin Murphy0f1d6662015-01-09 14:30:58 +000082
Roberto Vargasbcca6c62018-06-11 16:15:35 +010083/*******************************************************************************
84 * Memprotect definitions
85 ******************************************************************************/
86/* PSCI memory protect definitions:
87 * This variable is stored in a non-secure flash because some ARM reference
88 * platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
89 * support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
90 */
91#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
92 V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
93
Antonio Nino Diaz6f3ccc52018-07-20 09:17:26 +010094#endif /* JUNO_DEF_H */