Add support for Juno r1 in the platform reset handler
For Juno r0, the platform reset handler needs to:
- Implement the workaround for defect #831273
- Increase the L2 Data and Tag RAM latencies for Cortex-A57.
Defect #831273 does not affect Juno r1. Also, the default value
for the L2 Tag RAM latency for Cortex-A57 is suitable on Juno r1.
The L2 Data RAM latency for Cortex-A57 still needs to be
increased, though.
This patch modifies the Juno platform reset handler to detect
the board revision and skip the unnecessary steps on Juno r1.
The behaviour on Juno r0 is unchanged.
Change-Id: I27542917223e680ef923ee860900806ffcd0357b
diff --git a/plat/juno/juno_def.h b/plat/juno/juno_def.h
index ab39f3c..2134ee4 100644
--- a/plat/juno/juno_def.h
+++ b/plat/juno/juno_def.h
@@ -122,10 +122,23 @@
#define SYS_CNTREAD_BASE 0x2a800000
#define SYS_TIMCTL_BASE 0x2a810000
-/* V2M motherboard system registers & offsets */
+/*
+ * Base memory address of the V2M-Juno motherboard APB system registers in the
+ * IOFPGA
+ */
#define VE_SYSREGS_BASE 0x1c010000
+/* APB system registers in address offset order from the base memory address */
+#define V2M_SYS_ID 0x0
#define V2M_SYS_LED 0x8
+/* V2M SYS_ID register bits */
+#define SYS_ID_REV_SHIFT 28
+#define SYS_ID_REV_MASK 0xf
+
+/* Board revisions */
+#define REV_JUNO_R0 0x1 /* Rev B */
+#define REV_JUNO_R1 0x2 /* Rev C */
+
/*
* V2M sysled bit definitions. The values written to this
* register are defined in arch.h & runtime_svc.h. Only