| Stephan Gerhold | 14fdf07 | 2021-12-01 20:01:11 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net> |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | |
| 10 | #include <msm8916_mmap.h> |
| 11 | |
| 12 | #define APCS_TCM_START_ADDR 0x10 |
| 13 | #define APCS_TCM_REDIRECT_EN_0 BIT_32(0) |
| 14 | |
| 15 | .globl plat_crash_console_init |
| 16 | .globl plat_crash_console_putc |
| 17 | .globl plat_crash_console_flush |
| 18 | .globl plat_panic_handler |
| 19 | .globl plat_my_core_pos |
| 20 | .globl plat_get_my_entrypoint |
| 21 | .globl plat_reset_handler |
| 22 | .globl platform_mem_init |
| 23 | .globl msm8916_entry_point |
| 24 | |
| 25 | /* ------------------------------------------------- |
| 26 | * int plat_crash_console_init(void) |
| 27 | * Initialize the crash console. |
| 28 | * Out: x0 - 1 on success, 0 on error |
| 29 | * Clobber list : x0 - x4 |
| 30 | * ------------------------------------------------- |
| 31 | */ |
| 32 | func plat_crash_console_init |
| 33 | mov x1, #BLSP_UART2_BASE |
| 34 | |
| 35 | /* |
| 36 | * If the non-secure world has been actively using the UART there might |
| 37 | * be still some characters left to be sent in the FIFO. In that case, |
| 38 | * resetting the transmitter too early might cause all output to become |
| 39 | * corrupted. To avoid that, try to flush (wait until FIFO empty) first. |
| 40 | */ |
| 41 | mov x4, lr |
| 42 | bl console_uartdm_core_flush |
| 43 | mov lr, x4 |
| 44 | |
| 45 | mov x0, #1 |
| 46 | b console_uartdm_core_init |
| 47 | endfunc plat_crash_console_init |
| 48 | |
| 49 | /* ------------------------------------------------- |
| 50 | * int plat_crash_console_putc(int c) |
| 51 | * Print a character on the crash console. |
| 52 | * In : w0 - character to be printed |
| 53 | * Out: w0 - printed character on success |
| 54 | * Clobber list : x1, x2 |
| 55 | * ------------------------------------------------- |
| 56 | */ |
| 57 | func plat_crash_console_putc |
| 58 | mov x1, #BLSP_UART2_BASE |
| 59 | b console_uartdm_core_putc |
| 60 | endfunc plat_crash_console_putc |
| 61 | |
| 62 | /* ------------------------------------------------- |
| 63 | * void plat_crash_console_flush(void) |
| 64 | * Force a write of all buffered data that has not |
| 65 | * been output. |
| 66 | * Clobber list : x1, x2 |
| 67 | * ------------------------------------------------- |
| 68 | */ |
| 69 | func plat_crash_console_flush |
| 70 | mov x1, #BLSP_UART2_BASE |
| 71 | b console_uartdm_core_flush |
| 72 | endfunc plat_crash_console_flush |
| 73 | |
| 74 | /* ------------------------------------------------- |
| 75 | * void plat_panic_handler(void) __dead |
| 76 | * Called when an unrecoverable error occurs. |
| 77 | * ------------------------------------------------- |
| 78 | */ |
| 79 | func plat_panic_handler |
| 80 | /* Try to shutdown/reset */ |
| 81 | mov_imm x0, MPM_PS_HOLD |
| 82 | str wzr, [x0] |
| 83 | 1: b 1b |
| 84 | endfunc plat_panic_handler |
| 85 | |
| 86 | /* ------------------------------------------------- |
| 87 | * unsigned int plat_my_core_pos(void) |
| 88 | * Out: x0 - index of the calling CPU |
| 89 | * ------------------------------------------------- |
| 90 | */ |
| 91 | func plat_my_core_pos |
| 92 | /* There is just a single cluster so this is very simple */ |
| 93 | mrs x0, mpidr_el1 |
| 94 | and x0, x0, #MPIDR_CPU_MASK |
| 95 | ret |
| 96 | endfunc plat_my_core_pos |
| 97 | |
| 98 | /* ------------------------------------------------- |
| 99 | * uintptr_t plat_get_my_entrypoint(void) |
| 100 | * Distinguish cold and warm boot and return warm boot |
| 101 | * entry address if available. |
| 102 | * Out: x0 - warm boot entry point or 0 on cold boot |
| 103 | * ------------------------------------------------- |
| 104 | */ |
| 105 | func plat_get_my_entrypoint |
| 106 | ldr x0, msm8916_entry_point |
| 107 | ret |
| 108 | endfunc plat_get_my_entrypoint |
| 109 | |
| 110 | /* ------------------------------------------------- |
| 111 | * void plat_reset_handler(void) |
| 112 | * Perform additional initialization after reset. |
| 113 | * Clobber list : x0 - x18, x30 |
| 114 | * ------------------------------------------------- |
| 115 | */ |
| 116 | func plat_reset_handler |
| 117 | /* |
| 118 | * Check if the CPU is running at the correct address. |
| 119 | * During cold boot the CPU enters here at the wrong address |
| 120 | * using the "boot remapper". (It remaps the BL31_BASE to |
| 121 | * the CPU reset address 0x0). |
| 122 | */ |
| 123 | mov x0, #BL31_BASE |
| 124 | adr x1, bl31_entrypoint |
| 125 | cmp x0, x1 |
| 126 | b.ne _remapped_cold_boot |
| 127 | /* Already running at correct address, just return directly */ |
| 128 | ret |
| 129 | |
| 130 | _remapped_cold_boot: |
| 131 | /* |
| 132 | * The previous boot stage seems to use the L2 cache as TCM. |
| 133 | * Disable the TCM redirect before enabling caches to avoid |
| 134 | * strange crashes. |
| 135 | */ |
| 136 | mov x2, #APCS_CFG |
| 137 | ldr w3, [x2, #APCS_TCM_START_ADDR] |
| 138 | and w3, w3, #~APCS_TCM_REDIRECT_EN_0 |
| 139 | str w3, [x2, #APCS_TCM_START_ADDR] |
| 140 | |
| 141 | /* Enter BL31 again at the real address */ |
| 142 | br x0 |
| 143 | endfunc plat_reset_handler |
| 144 | |
| 145 | /* ------------------------------------------------- |
| 146 | * void platform_mem_init(void) |
| 147 | * Performs additional memory initialization early |
| 148 | * in the boot process. |
| 149 | * ------------------------------------------------- |
| 150 | */ |
| 151 | func platform_mem_init |
| 152 | /* Nothing to do here, all memory is already initialized */ |
| 153 | ret |
| 154 | endfunc platform_mem_init |
| 155 | |
| 156 | .data |
| 157 | .align 3 |
| 158 | |
| 159 | /* ------------------------------------------------- |
| 160 | * Warm boot entry point for CPU. Set by PSCI code. |
| 161 | * ------------------------------------------------- |
| 162 | */ |
| 163 | msm8916_entry_point: |
| 164 | .quad 0 |