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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00002 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2bd4ef22014-04-09 13:14:54 +01007#include <assert.h>
Vikram Kanigiri614f3952014-05-28 13:41:51 +01008#include <string.h>
Achin Gupta7aea9082014-02-01 07:51:28 +00009
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch.h>
Alexei Fedorovf41355c2019-09-13 14:11:59 +010011#include <arch_features.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012#include <arch_helpers.h>
13#include <bl31/bl31.h>
14#include <bl31/ehf.h>
15#include <common/bl_common.h>
16#include <common/debug.h>
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000017#include <common/feat_detect.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018#include <common/runtime_svc.h>
19#include <drivers/console.h>
20#include <lib/el3_runtime/context_mgmt.h>
21#include <lib/pmf/pmf.h>
22#include <lib/runtime_instr.h>
23#include <plat/common/platform.h>
24#include <services/std_svc.h>
25
dp-arm3cac7862016-09-19 11:18:44 +010026#if ENABLE_RUNTIME_INSTRUMENTATION
27PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
28 RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
29#endif
30
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000031/*******************************************************************************
32 * This function pointer is used to initialise the BL32 image. It's initialized
33 * by SPD calling bl31_register_bl32_init after setting up all things necessary
34 * for SP execution. In cases where both SPD and SP are absent, or when SPD
35 * finds it impossible to execute SP, this pointer is left as NULL
36 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010037static int32_t (*bl32_init)(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000038
Zelalem Aweke4d37db82021-07-11 18:33:20 -050039/*****************************************************************************
40 * Function used to initialise RMM if RME is enabled
41 *****************************************************************************/
42#if ENABLE_RME
43static int32_t (*rmm_init)(void);
44#endif
45
Achin Gupta7aea9082014-02-01 07:51:28 +000046/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000047 * Variable to indicate whether next image to execute after BL31 is BL33
48 * (non-secure & default) or BL32 (secure).
49 ******************************************************************************/
Vikram Kanigiri4e813412014-07-15 16:49:22 +010050static uint32_t next_image_type = NON_SECURE;
Achin Gupta35ca3512014-02-19 17:58:33 +000051
Javier Almansa Sobrinoe1ecd232020-08-20 18:48:09 +010052#ifdef SUPPORT_UNKNOWN_MPID
53/*
54 * Flag to know whether an unsupported MPID has been detected. To avoid having it
55 * landing on the .bss section, it is initialized to a non-zero value, this way
56 * we avoid potential WAW hazards during system bring up.
57 * */
58volatile uint32_t unsupported_mpid_flag = 1;
59#endif
60
Soby Mathew8da89662016-09-19 17:21:15 +010061/*
62 * Implement the ARM Standard Service function to get arguments for a
63 * particular service.
64 */
65uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
66{
67 /* Setup the arguments for PSCI Library */
68 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
69
70 /* PSCI is the only ARM Standard Service implemented */
71 assert(svc_mask == PSCI_FID_MASK);
72
73 return (uintptr_t)&psci_args;
74}
75
Achin Gupta35ca3512014-02-19 17:58:33 +000076/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000077 * Simple function to initialise all BL31 helper libraries.
78 ******************************************************************************/
Daniel Boulby5753e492018-09-20 14:12:46 +010079void __init bl31_lib_init(void)
Achin Gupta7aea9082014-02-01 07:51:28 +000080{
81 cm_init();
82}
Achin Gupta4f6ad662013-10-25 09:08:21 +010083
Achin Gupta4f6ad662013-10-25 09:08:21 +010084/*******************************************************************************
Antonio Nino Diaz47a90642019-01-31 11:01:26 +000085 * Setup function for BL31.
86 ******************************************************************************/
87void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
88 u_register_t arg3)
89{
90 /* Perform early platform-specific setup */
91 bl31_early_platform_setup2(arg0, arg1, arg2, arg3);
92
Antonio Nino Diaz47a90642019-01-31 11:01:26 +000093 /* Perform late platform-specific setup */
94 bl31_plat_arch_setup();
Alexei Fedorovf41355c2019-09-13 14:11:59 +010095
johpow01f91e59f2021-08-04 19:38:18 -050096#if ENABLE_FEAT_HCX
97 /*
98 * Assert that FEAT_HCX is supported on this system, without this check
99 * an exception would occur during context save/restore if enabled but
100 * not supported.
101 */
Andre Przywaraf20ad902022-11-15 11:45:19 +0000102 assert(is_feat_hcx_supported());
johpow01f91e59f2021-08-04 19:38:18 -0500103#endif /* ENABLE_FEAT_HCX */
104
Alexei Fedorovf41355c2019-09-13 14:11:59 +0100105#if CTX_INCLUDE_PAUTH_REGS
106 /*
107 * Assert that the ARMv8.3-PAuth registers are present or an access
108 * fault will be triggered when they are being saved or restored.
109 */
110 assert(is_armv8_3_pauth_present());
111#endif /* CTX_INCLUDE_PAUTH_REGS */
Antonio Nino Diaz47a90642019-01-31 11:01:26 +0000112}
113
114/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100115 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +0000116 * before passing control to the bootloader or an Operating System. This
117 * function calls runtime_svc_init() which initializes all registered runtime
118 * services. The run time services would setup enough context for the core to
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000119 * switch to the next exception level. When this function returns, the core will
Antonio Nino Diaz56b68ad2019-02-28 13:35:21 +0000120 * switch to the programmed exception level via an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100121 ******************************************************************************/
122void bl31_main(void)
123{
Juan Castillo7d199412015-12-14 09:35:25 +0000124 NOTICE("BL31: %s\n", version_string);
125 NOTICE("BL31: %s\n", build_message);
Dan Handley91b624e2014-07-29 17:14:00 +0100126
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000127#if FEATURE_DETECTION
128 /* Detect if features enabled during compilation are supported by PE. */
129 detect_arch_features();
130#endif /* FEATURE_DETECTION */
131
Javier Almansa Sobrinoe1ecd232020-08-20 18:48:09 +0100132#ifdef SUPPORT_UNKNOWN_MPID
133 if (unsupported_mpid_flag == 0) {
134 NOTICE("Unsupported MPID detected!\n");
135 }
136#endif
137
Soby Mathew1ff495b2015-12-09 11:28:43 +0000138 /* Perform platform setup in BL31 */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100139 bl31_platform_setup();
140
Achin Gupta7aea9082014-02-01 07:51:28 +0000141 /* Initialise helper libraries */
142 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100143
Jeenu Viswambharan10a67272017-09-22 08:32:10 +0100144#if EL3_EXCEPTION_HANDLING
145 INFO("BL31: Initialising Exception Handling Framework\n");
146 ehf_init();
147#endif
148
Soby Mathew8da89662016-09-19 17:21:15 +0100149 /* Initialize the runtime services e.g. psci. */
Juan Castillo7d199412015-12-14 09:35:25 +0000150 INFO("BL31: Initializing runtime services\n");
Achin Gupta7421b462014-02-01 18:53:26 +0000151 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100152
Achin Gupta35ca3512014-02-19 17:58:33 +0000153 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000154 * All the cold boot actions on the primary cpu are done. We now need to
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500155 * decide which is the next image and how to execute it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000156 * If the SPD runtime service is present, it would want to pass control
157 * to BL32 first in S-EL1. In that case, SPD would have registered a
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000158 * function to initialize bl32 where it takes responsibility of entering
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500159 * S-EL1 and returning control back to bl31_main. Similarly, if RME is
160 * enabled and a function is registered to initialize RMM, control is
161 * transferred to RMM in R-EL2. After RMM initialization, control is
162 * returned back to bl31_main. Once this is done we can prepare entry
163 * into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000164 */
165
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000166 /*
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000167 * If SPD had registered an init hook, invoke it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000168 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100169 if (bl32_init != NULL) {
Juan Castillo7d199412015-12-14 09:35:25 +0000170 INFO("BL31: Initializing BL32\n");
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100171
172 int32_t rc = (*bl32_init)();
173
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500174 if (rc == 0) {
Antonio Nino Diazf417a462018-09-18 13:10:47 +0100175 WARN("BL31: BL32 initialization failed\n");
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500176 }
177 }
178
179 /*
180 * If RME is enabled and init hook is registered, initialize RMM
181 * in R-EL2.
182 */
183#if ENABLE_RME
184 if (rmm_init != NULL) {
185 INFO("BL31: Initializing RMM\n");
186
187 int32_t rc = (*rmm_init)();
188
189 if (rc == 0) {
190 WARN("BL31: RMM initialization failed\n");
191 }
Dan Handley91b624e2014-07-29 17:14:00 +0100192 }
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500193#endif
194
Achin Gupta35ca3512014-02-19 17:58:33 +0000195 /*
196 * We are ready to enter the next EL. Prepare entry into the image
197 * corresponding to the desired security state after the next ERET.
198 */
199 bl31_prepare_next_image_entry();
Soby Mathew1ff495b2015-12-09 11:28:43 +0000200
Antonio Nino Diaze3962d02017-02-16 16:17:19 +0000201 console_flush();
202
Soby Mathew1ff495b2015-12-09 11:28:43 +0000203 /*
204 * Perform any platform specific runtime setup prior to cold boot exit
205 * from BL31
206 */
207 bl31_plat_runtime_setup();
Achin Gupta35ca3512014-02-19 17:58:33 +0000208}
209
210/*******************************************************************************
211 * Accessor functions to help runtime services decide which image should be
212 * executed after BL31. This is BL33 or the non-secure bootloader image by
213 * default but the Secure payload dispatcher could override this by requesting
214 * an entry into BL32 (Secure payload) first. If it does so then it should use
215 * the same API to program an entry into BL33 once BL32 initialisation is
216 * complete.
217 ******************************************************************************/
218void bl31_set_next_image_type(uint32_t security_state)
219{
Juan Castillof558cac2014-06-05 09:45:36 +0100220 assert(sec_state_is_valid(security_state));
Achin Gupta35ca3512014-02-19 17:58:33 +0000221 next_image_type = security_state;
222}
223
224uint32_t bl31_get_next_image_type(void)
225{
226 return next_image_type;
227}
228
229/*******************************************************************************
230 * This function programs EL3 registers and performs other setup to enable entry
231 * into the next image after BL31 at the next ERET.
232 ******************************************************************************/
Daniel Boulby5753e492018-09-20 14:12:46 +0100233void __init bl31_prepare_next_image_entry(void)
Achin Gupta35ca3512014-02-19 17:58:33 +0000234{
Vikram Kanigirida567432014-04-15 18:08:08 +0100235 entry_point_info_t *next_image_info;
Andrew Thoelke4e126072014-06-04 21:10:52 +0100236 uint32_t image_type;
Achin Gupta35ca3512014-02-19 17:58:33 +0000237
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100238#if CTX_INCLUDE_AARCH32_REGS
239 /*
240 * Ensure that the build flag to save AArch32 system registers in CPU
241 * context is not set for AArch64-only platforms.
242 */
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +0000243 if (el_implemented(1) == EL_IMPL_A64ONLY) {
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100244 ERROR("EL1 supports AArch64-only. Please set build flag "
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +0000245 "CTX_INCLUDE_AARCH32_REGS = 0\n");
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100246 panic();
247 }
248#endif
249
Achin Gupta35ca3512014-02-19 17:58:33 +0000250 /* Determine which image to execute next */
251 image_type = bl31_get_next_image_type();
252
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000253 /* Program EL3 registers to enable entry into the next EL */
Dan Handley701fea72014-05-27 16:17:21 +0100254 next_image_info = bl31_plat_get_next_image_ep_info(image_type);
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100255 assert(next_image_info != NULL);
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100256 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
Achin Gupta35ca3512014-02-19 17:58:33 +0000257
Juan Castillo7d199412015-12-14 09:35:25 +0000258 INFO("BL31: Preparing for EL3 exit to %s world\n",
Dan Handley91b624e2014-07-29 17:14:00 +0100259 (image_type == SECURE) ? "secure" : "normal");
Sandrine Bailleuxb2e224c2015-09-28 17:03:06 +0100260 print_entry_point_info(next_image_info);
Soby Mathew3700a922015-07-13 11:21:11 +0100261 cm_init_my_context(next_image_info);
Zelalem Awekef92c0cb2022-01-31 16:59:42 -0600262
263 /*
264 * If we are entering the Non-secure world, use
265 * 'cm_prepare_el3_exit_ns' to exit.
266 */
267 if (image_type == NON_SECURE) {
268 cm_prepare_el3_exit_ns();
269 } else {
270 cm_prepare_el3_exit(image_type);
271 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100272}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000273
274/*******************************************************************************
275 * This function initializes the pointer to BL32 init function. This is expected
276 * to be called by the SPD after it finishes all its initialization
277 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100278void bl31_register_bl32_init(int32_t (*func)(void))
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000279{
280 bl32_init = func;
281}
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500282
283#if ENABLE_RME
284/*******************************************************************************
285 * This function initializes the pointer to RMM init function. This is expected
286 * to be called by the RMMD after it finishes all its initialization
287 ******************************************************************************/
288void bl31_register_rmm_init(int32_t (*func)(void))
289{
290 rmm_init = func;
291}
292#endif