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Paul Beesleyf3653a62019-05-22 11:22:44 +01001STMicroelectronics STM32MP1
2===========================
Yann Gautier75115392018-07-16 14:49:34 +02003
4STM32MP1 is a microprocessor designed by STMicroelectronics
5based on a dual Arm Cortex-A7.
6It is an Armv7-A platform, using dedicated code from TF-A.
Yann Gautier969be342019-02-20 17:34:16 +01007The STM32MP1 chip also embeds a Cortex-M4.
8More information can be found on `STM32MP1 Series`_ page.
Yann Gautier75115392018-07-16 14:49:34 +02009
10
Yann Gautier26c10672020-10-13 11:27:05 +020011STM32MP1 Versions
12-----------------
13The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible:
14
15- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD
16- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD
17- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
18
19Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
20
21- A Basic + Cortex-A7 @ 650 MHz
22- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
23- D Basic + Cortex-A7 @ 800 MHz
24- F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
25
26The `STM32MP1 part number codification`_ page gives more information about part numbers.
27
Yann Gautier75115392018-07-16 14:49:34 +020028Design
29------
30The STM32MP1 resets in the ROM code of the Cortex-A7.
31The primary boot core (core 0) executes the boot sequence while
32secondary boot core (core 1) is kept in a holding pen loop.
33The ROM code boot sequence loads the TF-A binary image from boot device
34to embedded SRAM.
35
36The TF-A image must be properly formatted with a STM32 header structure
37for ROM code is able to load this image.
38Tool stm32image can be used to prepend this header to the generated TF-A binary.
39
40At compilation step, BL2, BL32 and DTB file are linked together in a single
41binary. The stm32image tool is also generated and the header is added to TF-A
42binary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32.
43It can then be copied in the first partition of the boot device.
44
45
46Memory mapping
47~~~~~~~~~~~~~~
48
49::
50
51 0x00000000 +-----------------+
52 | | ROM
53 0x00020000 +-----------------+
54 | |
55 | ... |
56 | |
57 0x2FFC0000 +-----------------+ \
58 | | |
59 | ... | |
60 | | |
61 0x2FFD8000 +-----------------+ |
62 | TF-A DTB | | Embedded SRAM
63 0x2FFDC000 +-----------------+ |
64 | BL2 | |
65 0x2FFEF000 +-----------------+ |
66 | BL32 | |
67 0x30000000 +-----------------+ /
68 | |
69 | ... |
70 | |
71 0x40000000 +-----------------+
72 | |
73 | | Devices
74 | |
75 0xC0000000 +-----------------+ \
76 | | |
77 0xC0100000 +-----------------+ |
78 | BL33 | | Non-secure RAM (DDR)
79 | ... | |
80 | | |
81 0xFFFFFFFF +-----------------+ /
82
83
84Boot sequence
85~~~~~~~~~~~~~
86
87ROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot)
88
Yann Gautierb3386f72019-04-19 09:41:01 +020089or if Op-TEE is used:
90
91ROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot)
92
Yann Gautier75115392018-07-16 14:49:34 +020093
94Build Instructions
95------------------
Lionel Debieve4066c902019-10-17 15:12:13 +020096Boot media(s) supported by BL2 must be specified in the build command.
97Available storage medias are:
98- ``STM32MP_SDMMC``
99- ``STM32MP_EMMC``
100- ``STM32MP_RAW_NAND``
101- ``STM32MP_SPI_NAND``
102- ``STM32MP_SPI_NOR``
Yann Gautier75115392018-07-16 14:49:34 +0200103
Lionel Debieve4066c902019-10-17 15:12:13 +0200104To build with SP_min and support for all bootable devices:
Yann Gautier75115392018-07-16 14:49:34 +0200105
106.. code:: bash
107
Lionel Debieve4066c902019-10-17 15:12:13 +0200108 make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=sp_min STM32MP_SDMMC=1 STM32MP_EMMC=1 STM32MP_RAW_NAND=1 STM32MP_SPI_NAND=1
109 STM32MP_SPI_NOR=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb
Yann Gautierb4ddd302018-10-24 10:50:12 +0200110 cd <u-boot_directory>
Yann Gautierb7168ee2019-05-20 11:50:18 +0200111 make stm32mp15_trusted_defconfig
Yann Gautier969be342019-02-20 17:34:16 +0100112 make DEVICE_TREE=stm32mp157c-ev1 all
Yann Gautier75115392018-07-16 14:49:34 +0200113
Lionel Debieve4066c902019-10-17 15:12:13 +0200114To build TF-A with OP-TEE support for all bootable devices:
Yann Gautierb3386f72019-04-19 09:41:01 +0200115.. code:: bash
116
Lionel Debieve4066c902019-10-17 15:12:13 +0200117 make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=optee STM32MP_SDMMC=1 STM32MP_EMMC=1 STM32MP_RAW_NAND=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb
118 cd <optee_directory>
119 make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts
120 cd <u-boot_directory>
Jan Kiszka30576a42020-10-02 10:07:00 +0200121 make stm32mp15_trusted_defconfig
Lionel Debieve4066c902019-10-17 15:12:13 +0200122 make DEVICE_TREE=stm32mp157c-ev1 all
123
Yann Gautierb3386f72019-04-19 09:41:01 +0200124
Yann Gautier75115392018-07-16 14:49:34 +0200125The following build options are supported:
126
127- ``ENABLE_STACK_PROTECTOR``: To enable the stack protection.
Yann Gautierb4ddd302018-10-24 10:50:12 +0200128
129
130Populate SD-card
131----------------
132
133The SD-card has to be formated with GPT.
134It should contain at least those partitions:
135
136- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary
137- ssbl: to copy the u-boot.stm32 binary
138
139Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl.
Yann Gautier969be342019-02-20 17:34:16 +0100140
Jan Kiszka30576a42020-10-02 10:07:00 +0200141OP-TEE artifacts go into separate partitions as follows:
142
143- teeh: tee-header_v2.stm32
144- teed: tee-pageable_v2.stm32
145- teex: tee-pager_v2.stm32
146
Yann Gautier969be342019-02-20 17:34:16 +0100147
148.. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html
Yann Gautier26c10672020-10-13 11:27:05 +0200149.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification