blob: 2038021a01a6e5bd651e649e87f65e8f061fc811 [file] [log] [blame]
Andre Przywara6d471e12019-07-09 11:25:57 +01001#
2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_INCLUDES := -Iplat/rpi/common/include \
11 -Iplat/rpi/rpi4/include
12
13PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
14 plat/rpi/common/rpi3_common.c \
15 ${XLAT_TABLES_LIB_SRCS}
16
17BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
18 plat/rpi/rpi4/aarch64/plat_helpers.S \
Andre Przywara2d8e99a2019-07-10 18:09:18 +010019 plat/rpi/rpi4/aarch64/armstub8_header.S \
Andre Przywara6d471e12019-07-09 11:25:57 +010020 drivers/arm/gic/common/gic_common.c \
21 drivers/arm/gic/v2/gicv2_helpers.c \
22 drivers/arm/gic/v2/gicv2_main.c \
23 plat/common/plat_gicv2.c \
24 plat/rpi/rpi4/rpi4_bl31_setup.c \
25 plat/rpi/common/rpi3_pm.c \
26 plat/common/plat_psci_common.c \
27 plat/rpi/common/rpi3_topology.c \
Andre Przywara88c9e1d2019-07-11 01:45:39 +010028 common/fdt_fixup.c \
Andre Przywara6d471e12019-07-09 11:25:57 +010029 ${LIBFDT_SRCS}
30
31# For now we only support BL31, using the kernel loaded by the GPU firmware.
32RESET_TO_BL31 := 1
33
34# All CPUs enter armstub8.bin.
35COLD_BOOT_SINGLE_CPU := 0
36
37# Tune compiler for Cortex-A72
38ifeq ($(notdir $(CC)),armclang)
39 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
40else ifneq ($(findstring clang,$(notdir $(CC))),)
41 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
42else
43 TF_CFLAGS_aarch64 += -mtune=cortex-a72
44endif
45
Andre Przywara2d8e99a2019-07-10 18:09:18 +010046# Add support for platform supplied linker script for BL31 build
47$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
Andre Przywara6d471e12019-07-09 11:25:57 +010048
49# Enable all errata workarounds for Cortex-A72
50ERRATA_A72_859971 := 1
51
52WORKAROUND_CVE_2017_5715 := 1
53
54# Add new default target when compiling this platform
55all: bl31
56
57# Build config flags
58# ------------------
59
60# Disable stack protector by default
61ENABLE_STACK_PROTECTOR := 0
62
63# Have different sections for code and rodata
64SEPARATE_CODE_AND_RODATA := 1
65
66# Use Coherent memory
67USE_COHERENT_MEM := 1
68
69# Platform build flags
70# --------------------
71
Andre Przywaraaa89ae42019-07-11 01:42:12 +010072# There is not much else than a Linux kernel to load at the moment.
73RPI3_DIRECT_LINUX_BOOT := 1
Andre Przywara6d471e12019-07-09 11:25:57 +010074
75# BL33 images are in AArch64 by default
76RPI3_BL33_IN_AARCH32 := 0
77
78# UART to use at runtime. -1 means the runtime UART is disabled.
79# Any other value means the default UART will be used.
80RPI3_RUNTIME_UART := 0
81
82# Use normal memory mapping for ROM, FIP, SRAM and DRAM
83RPI3_USE_UEFI_MAP := 0
84
85# Process platform flags
86# ----------------------
87
88$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
89$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
90ifdef RPI3_PRELOADED_DTB_BASE
91$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
92endif
93$(eval $(call add_define,RPI3_RUNTIME_UART))
94$(eval $(call add_define,RPI3_USE_UEFI_MAP))
95
Andre Przywara6d471e12019-07-09 11:25:57 +010096ifeq (${ARCH},aarch32)
97 $(error Error: AArch32 not supported on rpi4)
98endif
99
100ifneq ($(ENABLE_STACK_PROTECTOR), 0)
101PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
102 plat/rpi/common/rpi3_stack_protector.c
103endif