blob: 3ff180ea6172007fb975e07a49e5abf5bad80d34 [file] [log] [blame]
Andre Przywara6d471e12019-07-09 11:25:57 +01001#
2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_INCLUDES := -Iplat/rpi/common/include \
11 -Iplat/rpi/rpi4/include
12
13PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
14 plat/rpi/common/rpi3_common.c \
15 ${XLAT_TABLES_LIB_SRCS}
16
17BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
18 plat/rpi/rpi4/aarch64/plat_helpers.S \
19 drivers/arm/gic/common/gic_common.c \
20 drivers/arm/gic/v2/gicv2_helpers.c \
21 drivers/arm/gic/v2/gicv2_main.c \
22 plat/common/plat_gicv2.c \
23 plat/rpi/rpi4/rpi4_bl31_setup.c \
24 plat/rpi/common/rpi3_pm.c \
25 plat/common/plat_psci_common.c \
26 plat/rpi/common/rpi3_topology.c \
27 ${LIBFDT_SRCS}
28
29# For now we only support BL31, using the kernel loaded by the GPU firmware.
30RESET_TO_BL31 := 1
31
32# All CPUs enter armstub8.bin.
33COLD_BOOT_SINGLE_CPU := 0
34
35# Tune compiler for Cortex-A72
36ifeq ($(notdir $(CC)),armclang)
37 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
38else ifneq ($(findstring clang,$(notdir $(CC))),)
39 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
40else
41 TF_CFLAGS_aarch64 += -mtune=cortex-a72
42endif
43
44
45# Enable all errata workarounds for Cortex-A72
46ERRATA_A72_859971 := 1
47
48WORKAROUND_CVE_2017_5715 := 1
49
50# Add new default target when compiling this platform
51all: bl31
52
53# Build config flags
54# ------------------
55
56# Disable stack protector by default
57ENABLE_STACK_PROTECTOR := 0
58
59# Have different sections for code and rodata
60SEPARATE_CODE_AND_RODATA := 1
61
62# Use Coherent memory
63USE_COHERENT_MEM := 1
64
65# Platform build flags
66# --------------------
67
68# Assume that BL33 isn't the Linux kernel by default
69RPI3_DIRECT_LINUX_BOOT := 0
70
71# BL33 images are in AArch64 by default
72RPI3_BL33_IN_AARCH32 := 0
73
74# UART to use at runtime. -1 means the runtime UART is disabled.
75# Any other value means the default UART will be used.
76RPI3_RUNTIME_UART := 0
77
78# Use normal memory mapping for ROM, FIP, SRAM and DRAM
79RPI3_USE_UEFI_MAP := 0
80
81# Process platform flags
82# ----------------------
83
84$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
85$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
86ifdef RPI3_PRELOADED_DTB_BASE
87$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
88endif
89$(eval $(call add_define,RPI3_RUNTIME_UART))
90$(eval $(call add_define,RPI3_USE_UEFI_MAP))
91
92# Verify build config
93# -------------------
94#
95ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0)
96 ifndef RPI3_PRELOADED_DTB_BASE
97 $(error Error: RPI3_PRELOADED_DTB_BASE needed if RPI3_DIRECT_LINUX_BOOT=1)
98 endif
99endif
100
101ifeq (${ARCH},aarch32)
102 $(error Error: AArch32 not supported on rpi4)
103endif
104
105ifneq ($(ENABLE_STACK_PROTECTOR), 0)
106PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
107 plat/rpi/common/rpi3_stack_protector.c
108endif