blob: a225b405297c9f779564cc7129a9b71b5d0ba048 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001#
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +01002# Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Soby Mathew0d268dc2016-07-11 14:13:56 +01007ifeq (${ARCH}, aarch64)
8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
9 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000010 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000011
Dimitris Papastamos8a418592018-01-02 10:25:50 +000012 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080013
Soby Mathew0d268dc2016-07-11 14:13:56 +010014 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
20 else
21 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
22 endif
Dan Handley9df48042015-03-19 18:58:55 +000023
Soby Mathew0d268dc2016-07-11 14:13:56 +010024 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010025 # Process ARM_BL31_IN_DRAM flag
26 ARM_BL31_IN_DRAM := 0
27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
28 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010029else
30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010031endif
Dan Handley9df48042015-03-19 18:58:55 +000032
Roberto Vargasac6dc352017-10-20 10:46:23 +010033$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
34
35
Soby Mathew7799cf72015-04-16 14:49:09 +010036# For the original power-state parameter format, the State-ID can be encoded
37# according to the recommended encoding or zero. This flag determines which
38# State-ID encoding to be parsed.
39ARM_RECOM_STATE_ID_ENC := 0
40
Douglas Raillard66933ff2016-11-07 17:29:34 +000041# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
42# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010043ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000045 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
46 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010047 endif
48endif
49
50# Process ARM_RECOM_STATE_ID_ENC flag
51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
53
Juan Castillob6132f12015-10-06 14:01:35 +010054# Process ARM_DISABLE_TRUSTED_WDOG flag
55# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
56ARM_DISABLE_TRUSTED_WDOG := 0
57ifeq (${SPIN_ON_BL1_EXIT}, 1)
58ARM_DISABLE_TRUSTED_WDOG := 1
59endif
60$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
61$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
62
Juan Castilloaadf19a2015-11-06 16:02:32 +000063# Process ARM_CONFIG_CNTACR
64ARM_CONFIG_CNTACR := 1
65$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
66$(eval $(call add_define,ARM_CONFIG_CNTACR))
67
David Wang0ba499f2016-03-07 11:02:57 +080068# Process ARM_BL31_IN_DRAM flag
69ARM_BL31_IN_DRAM := 0
70$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
71$(eval $(call add_define,ARM_BL31_IN_DRAM))
72
Summer Qin93c812f2017-02-28 16:46:17 +000073# Process ARM_PLAT_MT flag
74ARM_PLAT_MT := 0
75$(eval $(call assert_boolean,ARM_PLAT_MT))
76$(eval $(call add_define,ARM_PLAT_MT))
77
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010078# Use translation tables library v2 by default
79ARM_XLAT_TABLES_LIB_V1 := 0
80$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
81$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
82
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010083# Don't have the Linux kernel as a BL33 image by default
84ARM_LINUX_KERNEL_AS_BL33 := 0
85$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
86$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
87
88ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywara6a3ac4e2021-02-08 17:40:48 +000089 ifneq (${ARCH},aarch64)
Manish Pandey37c4ec22018-11-02 13:28:25 +000090 ifneq (${RESET_TO_SP_MIN},1)
91 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
92 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010093 endif
94 ifndef PRELOADED_BL33_BASE
95 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
96 endif
97 ifndef ARM_PRELOADED_DTB_BASE
98 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
99 endif
100 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
101endif
102
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +0100103# Use an implementation of SHA-256 with a smaller memory footprint but reduced
104# speed.
105$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
106
Summer Qin80726782017-04-20 16:28:39 +0100107# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
108# in the FIP if the platform requires.
109ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900110$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +0100111endif
112ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900113$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +0100114endif
115
Soby Mathew421dbc42016-05-23 16:07:53 +0100116# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +0100117ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +0000118ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +0100119
Alexei Fedorov2381d2e2020-09-01 15:38:32 +0100120# Override the standard libc with optimised libc_asm
121OVERRIDE_LIBC := 1
122ifeq (${OVERRIDE_LIBC},1)
123 include lib/libc/libc_asm.mk
124endif
125
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100126# On ARM platforms, separate the code and read-only data sections to allow
127# mapping the former as executable and the latter as execute-never.
128SEPARATE_CODE_AND_RODATA := 1
129
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600130# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
131# and NOBITS sections of BL31 image are adjacent to each other and loaded
132# into Trusted SRAM.
133SEPARATE_NOBITS_REGION := 0
134
135# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
136# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
137# the build to require that ARM_BL31_IN_DRAM is enabled as well.
138ifeq ($(SEPARATE_NOBITS_REGION),1)
139 ifneq ($(ARM_BL31_IN_DRAM),1)
140 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
141 endif
142 ifneq ($(RECLAIM_INIT_CODE),0)
143 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
144 endif
145endif
146
Soby Mathew7e4d6652017-05-10 11:50:30 +0100147# Disable ARM Cryptocell by default
148ARM_CRYPTOCELL_INTEG := 0
149$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
150$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
151
Manish Pandey2207e932019-11-06 13:17:46 +0000152# Enable PIE support for RESET_TO_BL31 case
153ifeq (${RESET_TO_BL31},1)
154 ENABLE_PIE := 1
155endif
156
Soby Mathewb9856482018-09-18 11:42:42 +0100157# CryptoCell integration relies on coherent buffers for passing data from
158# the AP CPU to the CryptoCell
159ifeq (${ARM_CRYPTOCELL_INTEG},1)
160 ifeq (${USE_COHERENT_MEM},0)
161 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
162 endif
163endif
164
Soby Mathew0d268dc2016-07-11 14:13:56 +0100165ifeq (${ARCH}, aarch64)
166PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
167endif
Dan Handley9df48042015-03-19 18:58:55 +0000168
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100169PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100170 plat/arm/common/arm_common.c \
171 plat/arm/common/arm_console.c
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100172
173ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
174PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
175 lib/xlat_tables/${ARCH}/xlat_tables.c
176else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000177include lib/xlat_tables_v2/xlat_tables.mk
178
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100179PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
180endif
Dan Handley9df48042015-03-19 18:58:55 +0000181
Louis Mayencourt6b232d92020-02-28 16:57:30 +0000182ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100183 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez93df21f2020-01-23 11:24:33 +0100184ifeq (${SPD},spmd)
Olivier Deprez042db532020-03-19 09:27:11 +0100185 ifeq (${SPMD_SPM_AT_SEL2},1)
186 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
187 endif
Olivier Deprez93df21f2020-01-23 11:24:33 +0100188endif
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100189
Aditya Angadi20b48412019-04-16 11:29:14 +0530190BL1_SOURCES += drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000191 drivers/io/io_memmap.c \
192 drivers/io/io_storage.c \
193 plat/arm/common/arm_bl1_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000194 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100195 ${ARM_IO_SOURCES}
196
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000197ifdef EL3_PAYLOAD_BASE
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100198# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000199# their holding pen
200BL1_SOURCES += plat/arm/common/arm_pm.c
201endif
Dan Handley9df48042015-03-19 18:58:55 +0000202
Soby Mathew1ced6b82017-06-12 12:37:10 +0100203BL2_SOURCES += drivers/delay_timer/delay_timer.c \
204 drivers/delay_timer/generic_delay_timer.c \
205 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000206 drivers/io/io_memmap.c \
207 drivers/io/io_storage.c \
208 plat/arm/common/arm_bl2_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000209 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100210 ${ARM_IO_SOURCES}
Roberto Vargas52207802017-11-17 13:22:18 +0000211
Louis Mayencourt944ade82019-08-08 12:03:26 +0100212# Firmware Configuration Framework sources
213include lib/fconf/fconf.mk
Roberto Vargas52207802017-11-17 13:22:18 +0000214
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000215# Add `libfdt` and Arm common helpers required for Dynamic Config
216include lib/libfdt/libfdt.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100217
218DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000219 plat/arm/common/arm_dyn_cfg_helpers.c \
Roberto Vargas27bc9f92018-05-08 10:27:10 +0100220 common/fdt_wrappers.c
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000221
Soby Mathew45e39e22018-03-26 15:16:46 +0100222BL1_SOURCES += ${DYN_CFG_SOURCES}
223BL2_SOURCES += ${DYN_CFG_SOURCES}
224
Roberto Vargas52207802017-11-17 13:22:18 +0000225ifeq (${BL2_AT_EL3},1)
226BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
227endif
228
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000229# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
230# the AArch32 descriptors.
231ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
232BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
233else
234BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
235endif
236BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100237 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100238ifeq (${SPD},opteed)
239BL2_SOURCES += lib/optee/optee_utils.c
240endif
Dan Handley9df48042015-03-19 18:58:55 +0000241
Soby Mathew1ced6b82017-06-12 12:37:10 +0100242BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
243 drivers/delay_timer/generic_delay_timer.c \
244 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100245
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000246BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000247 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000248 plat/arm/common/arm_topology.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100249 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100250
dp-arm1cebefd2016-09-19 11:21:03 +0100251ifeq (${ENABLE_PMF}, 1)
Bence Szépkúti16362c62019-10-24 15:53:23 +0200252ifeq (${ARCH}, aarch64)
253BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
254 plat/arm/common/arm_sip_svc.c \
dp-arm1cebefd2016-09-19 11:21:03 +0100255 lib/pmf/pmf_smc.c
Bence Szépkúti78dc10c2019-11-07 12:09:24 +0100256else
257BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
258 lib/pmf/pmf_smc.c
dp-arm1cebefd2016-09-19 11:21:03 +0100259endif
Bence Szépkúti16362c62019-10-24 15:53:23 +0200260endif
dp-arm1cebefd2016-09-19 11:21:03 +0100261
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100262ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy1c478392020-08-12 18:42:13 +0530263BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100264endif
265
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100266ifeq (${SDEI_SUPPORT},1)
267BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100268ifeq (${SDEI_IN_FCONF},1)
269BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
270endif
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100271endif
272
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000273# RAS sources
274ifeq (${RAS_EXTENSION},1)
275BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100276 lib/extensions/ras/ras_common.c
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000277endif
278
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000279# Pointer Authentication sources
280ifeq (${ENABLE_PAUTH}, 1)
Alexei Fedorovf41355c2019-09-13 14:11:59 +0100281PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
282 lib/extensions/pauth/pauth_helpers.S
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000283endif
284
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100285ifeq (${SPD},spmd)
286BL31_SOURCES += plat/common/plat_spmd_manifest.c \
287 common/fdt_wrappers.c \
288 ${LIBFDT_SRCS}
289
290endif
291
Juan Castilloa08a5e72015-05-19 11:54:12 +0100292ifneq (${TRUSTED_BOARD_BOOT},0)
293
Juan Castilloa08a5e72015-05-19 11:54:12 +0100294 # Include common TBB sources
295 AUTH_SOURCES := drivers/auth/auth_mod.c \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000296 drivers/auth/crypto_mod.c \
297 drivers/auth/img_parser_mod.c \
Louis Mayencourt4da9b312019-09-30 10:57:24 +0100298 lib/fconf/fconf_tbbr_getter.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100299
300 # Include the selected chain of trust sources.
301 ifeq (${COT},tbbr)
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100302 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
303 drivers/auth/tbbr/tbbr_cot_bl1.c
304 ifneq (${COT_DESC_IN_DTB},0)
305 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
306 else
307 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
308 drivers/auth/tbbr/tbbr_cot_bl2.c
309 endif
Sandrine Bailleux012f8712020-02-06 14:59:33 +0100310 else ifeq (${COT},dualroot)
311 AUTH_SOURCES += drivers/auth/dualroot/cot.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100312 else
313 $(error Unknown chain of trust ${COT})
314 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100315
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000316 BL1_SOURCES += ${AUTH_SOURCES} \
317 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000318 plat/arm/common/arm_bl1_fwu.c \
319 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100320
dp-armb3e85802016-12-12 14:48:13 +0000321 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkhefe46f5f2020-05-27 09:39:42 +0100322 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100323
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900324 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100325
Juan Castilloa08a5e72015-05-19 11:54:12 +0100326 # We expect to locate the *.mk files under the directories specified below
Soby Mathew7e4d6652017-05-10 11:50:30 +0100327ifeq (${ARM_CRYPTOCELL_INTEG},0)
Juan Castilloa08a5e72015-05-19 11:54:12 +0100328 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Soby Mathew7e4d6652017-05-10 11:50:30 +0100329else
330 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
331endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100332 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
333
334 $(info Including ${CRYPTO_LIB_MK})
335 include ${CRYPTO_LIB_MK}
336
337 $(info Including ${IMG_PARSER_LIB_MK})
338 include ${IMG_PARSER_LIB_MK}
339
340endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100341
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100342ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100343 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
344 $(error "To reclaim init code xlat tables v2 must be used")
345 endif
346endif
Alexei Fedorov71d81dc2020-07-13 13:58:06 +0100347
348ifeq (${MEASURED_BOOT},1)
349 MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk
350 $(info Including ${MEASURED_BOOT_MK})
351 include ${MEASURED_BOOT_MK}
352endif