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Chandni Cherukuri626a52d2018-08-16 13:43:23 +05301#
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +05302# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
Chandni Cherukuri626a52d2018-08-16 13:43:23 +05303#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include plat/arm/css/sgi/sgi-common.mk
8
Chandni Cherukuri533b5542019-02-22 16:44:49 +05309RDE1EDGE_BASE = plat/arm/board/rde1edge
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053010
Chandni Cherukuri533b5542019-02-22 16:44:49 +053011PLAT_INCLUDES += -I${RDE1EDGE_BASE}/include/
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053012
John Tsichritzis16e6d9f2019-02-19 14:01:55 +000013SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_e1.S
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053014
Aditya Angadi502d0ac2020-11-18 08:27:15 +053015PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
16
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010017BL1_SOURCES += ${SGI_CPU_SOURCES} \
18 ${RDE1EDGE_BASE}/rde1edge_err.c
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053019
Chandni Cherukuri533b5542019-02-22 16:44:49 +053020BL2_SOURCES += ${RDE1EDGE_BASE}/rde1edge_plat.c \
21 ${RDE1EDGE_BASE}/rde1edge_security.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010022 ${RDE1EDGE_BASE}/rde1edge_err.c \
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053023 drivers/arm/tzc/tzc_dmc620.c \
24 lib/utils/mem_region.c \
25 plat/arm/common/arm_nor_psci_mem_protect.c
26
27BL31_SOURCES += ${SGI_CPU_SOURCES} \
Chandni Cherukuri533b5542019-02-22 16:44:49 +053028 ${RDE1EDGE_BASE}/rde1edge_plat.c \
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +053029 ${RDE1EDGE_BASE}/rde1edge_topology.c \
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053030 drivers/cfi/v2m/v2m_flash.c \
31 lib/utils/mem_region.c \
32 plat/arm/common/arm_nor_psci_mem_protect.c
33
Max Shvetsov06dba292019-12-06 11:50:12 +000034ifeq (${TRUSTED_BOARD_BOOT}, 1)
35BL1_SOURCES += ${RDE1EDGE_BASE}/rde1edge_trusted_boot.c
36BL2_SOURCES += ${RDE1EDGE_BASE}/rde1edge_trusted_boot.c
37endif
38
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053039# Add the FDT_SOURCES and options for Dynamic Config
Manish V Badarkhe64616a52020-05-31 08:53:40 +010040FDT_SOURCES += ${RDE1EDGE_BASE}/fdts/${PLAT}_fw_config.dts \
41 ${RDE1EDGE_BASE}/fdts/${PLAT}_tb_fw_config.dts
42FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
43TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053044
Manish V Badarkhe64616a52020-05-31 08:53:40 +010045# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010046$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053047# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010048$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053049
Chandni Cherukuri533b5542019-02-22 16:44:49 +053050FDT_SOURCES += ${RDE1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053051NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
52
53# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010054$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053055
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +053056ifneq ($(CSS_SGI_CHIP_COUNT),1)
57 $(error "Chip count for RDE1Edge should be 1, currently set to \
58 ${CSS_SGI_CHIP_COUNT}.")
59endif
60
Aditya Angadi06402222021-03-20 12:06:15 +053061ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
62 $(error "CSS_SGI_PLATFORM_VARIANT for RD-E1-Edge should always be 0, \
63 currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
64endif
65
Chandni Cherukuri626a52d2018-08-16 13:43:23 +053066override CTX_INCLUDE_AARCH32_REGS := 0