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Nicolas Le Bayon620ce332021-03-02 11:19:36 +01001/*
Nicolas Le Bayon068d3412021-07-01 14:44:22 +02002 * Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
Nicolas Le Bayon620ce332021-03-02 11:19:36 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautierdcdc2fd2022-01-19 14:15:48 +01007#include <common/debug.h>
Nicolas Le Bayon620ce332021-03-02 11:19:36 +01008#include <drivers/st/stm32mp_ddr_test.h>
9#include <lib/mmio.h>
10
11#include <platform_def.h>
12
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020013#ifdef __aarch64__
14#define DDR_PATTERN 0xAAAAAAAAAAAAAAAAUL
15#define DDR_ANTIPATTERN 0x5555555555555555UL
16#else /* !__aarch64__ */
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010017#define DDR_PATTERN 0xAAAAAAAAU
18#define DDR_ANTIPATTERN 0x55555555U
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020019#endif /* __aarch64__ */
20
21static void mmio_write_pattern(uintptr_t addr, u_register_t value)
22{
23#ifdef __aarch64__
24 mmio_write_64(addr, (uint64_t)value);
25#else /* !__aarch64__ */
26 mmio_write_32(addr, (uint32_t)value);
27#endif /* __aarch64__ */
28}
29
30static u_register_t mmio_read_pattern(uintptr_t addr)
31{
32#ifdef __aarch64__
33 return (u_register_t)mmio_read_64(addr);
34#else /* !__aarch64__ */
35 return (u_register_t)mmio_read_32(addr);
36#endif /* __aarch64__ */
37}
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010038
39/*******************************************************************************
40 * This function tests a simple read/write access to the DDR.
41 * Note that the previous content is restored after test.
42 * Returns 0 if success, and address value else.
43 ******************************************************************************/
Yann Gautier41330b22023-09-18 09:40:37 +020044uintptr_t stm32mp_ddr_test_rw_access(void)
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010045{
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020046 u_register_t saved_value = mmio_read_pattern(STM32MP_DDR_BASE);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010047
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020048 mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010049
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020050 if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
Yann Gautier41330b22023-09-18 09:40:37 +020051 return STM32MP_DDR_BASE;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010052 }
53
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020054 mmio_write_pattern(STM32MP_DDR_BASE, saved_value);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010055
Yann Gautier41330b22023-09-18 09:40:37 +020056 return 0UL;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010057}
58
59/*******************************************************************************
60 * This function tests the DDR data bus wiring.
61 * This is inspired from the Data Bus Test algorithm written by Michael Barr
62 * in "Programming Embedded Systems in C and C++" book.
63 * resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
64 * File: memtest.c - This source code belongs to Public Domain.
65 * Returns 0 if success, and address value else.
66 ******************************************************************************/
Yann Gautier41330b22023-09-18 09:40:37 +020067uintptr_t stm32mp_ddr_test_data_bus(void)
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010068{
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020069 u_register_t pattern;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010070
71 for (pattern = 1U; pattern != 0U; pattern <<= 1U) {
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020072 mmio_write_pattern(STM32MP_DDR_BASE, pattern);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010073
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020074 if (mmio_read_pattern(STM32MP_DDR_BASE) != pattern) {
Yann Gautier41330b22023-09-18 09:40:37 +020075 return STM32MP_DDR_BASE;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010076 }
77 }
78
Yann Gautier41330b22023-09-18 09:40:37 +020079 return 0UL;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010080}
81
82/*******************************************************************************
83 * This function tests the DDR address bus wiring.
84 * This is inspired from the Data Bus Test algorithm written by Michael Barr
85 * in "Programming Embedded Systems in C and C++" book.
86 * resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
87 * File: memtest.c - This source code belongs to Public Domain.
88 * size: size in bytes of the DDR memory device.
89 * Returns 0 if success, and address value else.
90 ******************************************************************************/
Yann Gautier41330b22023-09-18 09:40:37 +020091uintptr_t stm32mp_ddr_test_addr_bus(size_t size)
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010092{
Yann Gautier41330b22023-09-18 09:40:37 +020093 size_t addressmask = size - 1U;
94 size_t offset;
95 size_t testoffset = 0U;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010096
97 /* Write the default pattern at each of the power-of-two offsets. */
Nicolas Le Bayon068d3412021-07-01 14:44:22 +020098 for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +010099 offset <<= 1U) {
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200100 mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_PATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100101 }
102
103 /* Check for address bits stuck high. */
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200104 mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100105
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200106 for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100107 offset <<= 1U) {
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200108 if (mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) {
Yann Gautier41330b22023-09-18 09:40:37 +0200109 return STM32MP_DDR_BASE + offset;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100110 }
111 }
112
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200113 mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100114
115 /* Check for address bits stuck low or shorted. */
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200116 for (testoffset = sizeof(u_register_t); (testoffset & addressmask) != 0U;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100117 testoffset <<= 1U) {
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200118 mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100119
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200120 if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100121 return STM32MP_DDR_BASE;
122 }
123
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200124 for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
125 offset <<= 1U) {
126 if ((mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) &&
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100127 (offset != testoffset)) {
Yann Gautier41330b22023-09-18 09:40:37 +0200128 return STM32MP_DDR_BASE + offset;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100129 }
130 }
131
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200132 mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100133 }
134
Yann Gautier41330b22023-09-18 09:40:37 +0200135 return 0UL;
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100136}
137
138/*******************************************************************************
139 * This function checks the DDR size. It has to be run with Data Cache off.
140 * This test is run before data have been put in DDR, and is only done for
141 * cold boot. The DDR data can then be overwritten, and it is not useful to
142 * restore its content.
143 * Returns DDR computed size.
144 ******************************************************************************/
Yann Gautier41330b22023-09-18 09:40:37 +0200145size_t stm32mp_ddr_check_size(void)
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100146{
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200147 size_t offset = sizeof(u_register_t);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100148
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200149 mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100150
151 while (offset < STM32MP_DDR_MAX_SIZE) {
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200152 mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100153 dsb();
154
Nicolas Le Bayon068d3412021-07-01 14:44:22 +0200155 if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100156 break;
157 }
158
159 offset <<= 1U;
160 }
161
Nicolas Le Bayon620ce332021-03-02 11:19:36 +0100162 return offset;
163}