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Jeenu Viswambharan615ff392016-10-24 14:31:51 +01001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2016-2023, Arm Limited. All rights reserved.
Jeenu Viswambharan615ff392016-10-24 14:31:51 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Jeenu Viswambharan615ff392016-10-24 14:31:51 +01005#
6
7# Default, static values for build variables, listed in alphabetic order.
8# Dependencies between build options, if any, are handled in the top-level
9# Makefile, after this file is included. This ensures that the former is better
10# poised to handle dependencies, as all build variables would have a default
11# value by then.
12
Antonio Nino Diaz80914a82018-08-08 16:28:43 +010013# Use T32 by default
14AARCH32_INSTRUCTION_SET := T32
15
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010016# The AArch32 Secure Payload to be built as BL32 image
17AARCH32_SP := none
18
19# The Target build architecture. Supported values are: aarch64, aarch32.
20ARCH := aarch64
21
Alexei Fedorov132e6652020-12-07 16:38:53 +000022# ARM Architecture feature modifiers: none by default
23ARM_ARCH_FEATURE := none
24
Jeenu Viswambharanfca76802017-01-16 16:52:35 +000025# ARM Architecture major and minor versions: 8.0 by default.
26ARM_ARCH_MAJOR := 8
27ARM_ARCH_MINOR := 0
28
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010029# Base commit to perform code check on
30BASE_COMMIT := origin/master
31
Roberto Vargase0e99462017-10-30 14:43:43 +000032# Execute BL2 at EL3
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -060033RESET_TO_BL2 := 0
Roberto Vargase0e99462017-10-30 14:43:43 +000034
Balint Dobszay719ba9c2021-03-26 16:23:18 +010035# Only use SP packages if SP layout JSON is defined
36BL2_ENABLE_SP_LOAD := 0
37
Jiafei Pan43a7bf42018-03-21 07:20:09 +000038# BL2 image is stored in XIP memory, for now, this option is only supported
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -060039# when RESET_TO_BL2 is 1.
Jiafei Pan43a7bf42018-03-21 07:20:09 +000040BL2_IN_XIP_MEM := 0
41
Hadi Asyrafi461f8f42019-08-20 15:33:27 +080042# Do dcache invalidate upon BL2 entry at EL3
43BL2_INV_DCACHE := 1
44
Alexei Fedorov90f2e882019-05-24 12:17:09 +010045# Select the branch protection features to use.
46BRANCH_PROTECTION := 0
47
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010048# By default, consider that the platform may release several CPUs out of reset.
49# The platform Makefile is free to override this value.
50COLD_BOOT_SINGLE_CPU := 0
51
Julius Wernerb624ae02017-06-09 15:17:15 -070052# Flag to compile in coreboot support code. Exclude by default. The coreboot
53# Makefile system will set this when compiling TF as part of a coreboot image.
54COREBOOT := 0
55
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010056# For Chain of Trust
57CREATE_KEYS := 1
58
59# Build flag to include AArch32 registers in cpu context save and restore during
60# world switch. This flag must be set to 0 for AArch64-only platforms.
61CTX_INCLUDE_AARCH32_REGS := 1
62
63# Include FP registers in cpu context
64CTX_INCLUDE_FPREGS := 0
65
66# Debug build
67DEBUG := 0
68
Sumit Garg392e4df2019-11-15 10:43:00 +053069# By default disable authenticated decryption support.
70DECRYPTION_SUPPORT := none
71
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010072# Build platform
73DEFAULT_PLAT := fvp
74
Christoph Müllner4f088e42019-04-24 09:45:30 +020075# Disable the generation of the binary image (ELF only).
76DISABLE_BIN_GENERATION := 0
77
Soby Mathew9fe88042018-03-26 12:43:37 +010078# Enable capability to disable authentication dynamically. Only meant for
79# development platforms.
80DYN_DISABLE_AUTH := 0
81
Chris Kay03be39d2021-05-05 13:38:30 +010082# Enable the Maximum Power Mitigation Mechanism on supporting cores.
83ENABLE_MPMM := 0
84
85# Enable MPMM configuration via FCONF.
86ENABLE_MPMM_FCONF := 0
87
Soby Mathew078f1a42018-08-28 11:13:55 +010088# Flag to Enable Position Independant support (PIE)
89ENABLE_PIE := 0
90
Jeenu Viswambharan615ff392016-10-24 14:31:51 +010091# Flag to enable Performance Measurement Framework
92ENABLE_PMF := 0
93
94# Flag to enable PSCI STATs functionality
95ENABLE_PSCI_STAT := 0
96
97# Flag to enable runtime instrumentation using PMF
98ENABLE_RUNTIME_INSTRUMENTATION := 0
99
Douglas Raillard306593d2017-02-24 18:14:15 +0000100# Flag to enable stack corruption protection
101ENABLE_STACK_PROTECTOR := 0
102
Jeenu Viswambharan10a67272017-09-22 08:32:10 +0100103# Flag to enable exception handling in EL3
104EL3_EXCEPTION_HANDLING := 0
105
Sumit Gargeec52442019-11-14 16:33:45 +0530106# By default BL31 encryption disabled
107ENCRYPT_BL31 := 0
108
109# By default BL32 encryption disabled
110ENCRYPT_BL32 := 0
111
112# Default dummy firmware encryption key
113ENC_KEY := 1234567890abcdef1234567890abcdef1234567890abcdef1234567890abcdef
114
115# Default dummy nonce for firmware encryption
116ENC_NONCE := 1234567890abcdef12345678
117
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100118# Build flag to treat usage of deprecated platform and framework APIs as error.
119ERROR_DEPRECATED := 0
120
Jeenu Viswambharanf00da742017-12-08 12:13:51 +0000121# Fault injection support
122FAULT_INJECTION_SUPPORT := 0
123
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000124# Flag to enable architectural features detection mechanism
125FEATURE_DETECTION := 0
126
Masahiro Yamada4d87eb42016-12-25 13:52:22 +0900127# Byte alignment that each component in FIP is aligned to
128FIP_ALIGN := 0
129
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100130# Default FIP file name
131FIP_NAME := fip.bin
132
133# Default FWU_FIP file name
134FWU_FIP_NAME := fwu_fip.bin
135
Sumit Gargeec52442019-11-14 16:33:45 +0530136# By default firmware encryption with SSK
137FW_ENC_STATUS := 0
138
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100139# For Chain of Trust
140GENERATE_COT := 0
141
Jeenu Viswambharanc06f05c2017-09-22 08:32:09 +0100142# Hint platform interrupt control layer that Group 0 interrupts are for EL3. By
143# default, they are for Secure EL1.
144GICV2_G0_FOR_EL3 := 0
145
Manish Pandey0e3379d2022-10-10 11:43:08 +0100146# Route NS External Aborts to EL3. Disabled by default; External Aborts are handled
Jeenu Viswambharan96c7df02017-11-30 12:54:15 +0000147# by lower ELs.
Manish Pandey0e3379d2022-10-10 11:43:08 +0100148HANDLE_EA_EL3_FIRST_NS := 0
Jeenu Viswambharan96c7df02017-11-30 12:54:15 +0000149
Raymond Mao98983392023-07-25 07:53:35 -0700150# Enable Handoff protocol using transfer lists
151TRANSFER_LIST := 0
152
Bipin Ravie53e6ae2023-09-28 13:17:24 -0500153# Enables support for the gcc compiler option "-mharden-sls=all".
154# By default, disables all SLS hardening.
155HARDEN_SLS := 0
156
Alexei Fedorovf11aeb72020-10-06 15:54:12 +0100157# Secure hash algorithm flag, accepts 3 values: sha256, sha384 and sha512.
158# The default value is sha256.
159HASH_ALG := sha256
160
Jeenu Viswambharana10d64e2017-01-04 13:51:42 +0000161# Whether system coherency is managed in hardware, without explicit software
162# operations.
163HW_ASSISTED_COHERENCY := 0
164
Varun Wadekar0a46eb12023-04-13 21:06:18 +0100165# Flag to enable trapping of implementation defined sytem registers
166IMPDEF_SYSREG_TRAP := 0
167
Soby Mathew13b16052017-08-31 11:49:32 +0100168# Set the default algorithm for the generation of Trusted Board Boot keys
169KEY_ALG := rsa
170
Leonardo Sandoval849f7af2020-06-18 17:32:55 -0500171# Set the default key size in case KEY_ALG is rsa
172ifeq ($(KEY_ALG),rsa)
173KEY_SIZE := 2048
174endif
175
Alexei Fedorov913cb7e2020-01-23 14:27:38 +0000176# Option to build TF with Measured Boot support
177MEASURED_BOOT := 0
178
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100179# NS timer register save and restore
180NS_TIMER_SWITCH := 0
181
Varun Wadekar3f9002c2019-01-31 09:22:30 -0800182# Include lib/libc in the final image
183OVERRIDE_LIBC := 0
184
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100185# Build PL011 UART driver in minimal generic UART mode
186PL011_GENERIC_UART := 0
187
188# By default, consider that the platform's reset address is not programmable.
189# The platform Makefile is free to override this value.
190PROGRAMMABLE_RESET_ADDRESS := 0
191
Antonio Nino Diaz56b68ad2019-02-28 13:35:21 +0000192# Flag used to choose the power state format: Extended State-ID or Original
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100193PSCI_EXTENDED_STATE_ID := 0
194
Wing Li1e9b68a2023-01-26 18:33:36 -0800195# Enable PSCI OS-initiated mode support
196PSCI_OS_INIT_MODE := 0
197
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100198# By default, BL1 acts as the reset handler, not BL31
199RESET_TO_BL31 := 0
200
201# For Chain of Trust
202SAVE_KEYS := 0
203
Jeenu Viswambharan04e3a7f2017-10-16 08:43:14 +0100204# Software Delegated Exception support
johpow019baade32021-07-08 14:14:00 -0500205SDEI_SUPPORT := 0
Jeenu Viswambharan04e3a7f2017-10-16 08:43:14 +0100206
Jayanth Dodderi Chidanand7c7faff2022-10-11 17:16:07 +0100207# True Random Number firmware Interface support
johpow019baade32021-07-08 14:14:00 -0500208TRNG_SUPPORT := 0
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500209
Sona Mathew7fe03522022-11-18 18:05:38 -0600210# Check to see if Errata ABI is supported
211ERRATA_ABI_SUPPORT := 0
212
Sona Mathew5a4c9fc2023-03-14 14:02:03 -0500213# Check to enable Errata ABI for platforms with non-arm interconnect
214ERRATA_NON_ARM_INTERCONNECT := 0
215
Jeremy Linton90cbf522020-11-18 10:12:41 -0600216# SMCCC PCI support
johpow019baade32021-07-08 14:14:00 -0500217SMC_PCI_SUPPORT := 0
Jeremy Linton90cbf522020-11-18 10:12:41 -0600218
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100219# Whether code and read-only data should be put on separate memory pages. The
220# platform Makefile is free to override this value.
221SEPARATE_CODE_AND_RODATA := 0
222
Samuel Holland31a14e12018-10-17 21:40:18 -0500223# Put NOBITS sections (.bss, stacks, page tables, and coherent memory) in a
224# separate memory region, which may be discontiguous from the rest of BL31.
225SEPARATE_NOBITS_REGION := 0
226
Jiafei Pan0824b452022-02-24 10:47:33 +0800227# Put BL2 NOLOAD sections (.bss, stacks, page tables) in a separate memory
228# region, platform Makefile is free to override this value.
229SEPARATE_BL2_NOLOAD_REGION := 0
230
Daniel Boulby468f0d72018-09-18 11:45:51 +0100231# If the BL31 image initialisation code is recalimed after use for the secondary
232# cores stack
233RECLAIM_INIT_CODE := 0
234
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100235# SPD choice
236SPD := none
237
Paul Beesleyfe975b42019-09-16 11:29:03 +0000238# Enable the Management Mode (MM)-based Secure Partition Manager implementation
239SPM_MM := 0
Antonio Nino Diaz8cd7ea32018-10-30 11:08:08 +0000240
Marc Bonniciabaac162021-12-01 18:00:40 +0000241# Use the FF-A SPMC implementation in EL3.
242SPMC_AT_EL3 := 0
243
Nishant Sharma9e719112023-06-27 00:36:01 +0100244# Enable SEL0 SP when SPMC is enabled at EL3
245SPMC_AT_EL3_SEL0_SP :=0
246
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000247# Use SPM at S-EL2 as a default config for SPMD
248SPMD_SPM_AT_SEL2 := 1
249
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100250# Flag to introduce an infinite loop in BL1 just before it exits into the next
251# image. This is meant to help debugging the post-BL2 phase.
252SPIN_ON_BL1_EXIT := 0
253
254# Flags to build TF with Trusted Boot support
255TRUSTED_BOARD_BOOT := 0
256
Antonio Nino Diazd8d734c2018-09-25 09:41:08 +0100257# Build option to choose whether Trusted Firmware uses Coherent memory or not.
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100258USE_COHERENT_MEM := 1
259
Olivier Deprezcb4c5622019-09-19 17:46:46 +0200260# Build option to add debugfs support
261USE_DEBUGFS := 0
262
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100263# Build option to fconf based io
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100264ARM_IO_IN_DTB := 0
265
266# Build option to support SDEI through fconf
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500267SDEI_IN_FCONF := 0
268
269# Build option to support Secure Interrupt descriptors through fconf
270SEC_INT_DESC_IN_FCONF := 0
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100271
Antonio Nino Diazd8d734c2018-09-25 09:41:08 +0100272# Build option to choose whether Trusted Firmware uses library at ROM
273USE_ROMLIB := 0
Roberto Vargase92111a2018-05-22 16:05:42 +0100274
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000275# Build option to choose whether the xlat tables of BL images can be read-only.
276# Note that this only serves as a higher level option to PLAT_RO_XLAT_TABLES,
277# which is the per BL-image option that actually enables the read-only tables
278# API. The reason for having this additional option is to have a common high
279# level makefile where we can check for incompatible features/build options.
280ALLOW_RO_XLAT_TABLES := 0
281
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100282# Chain of trust.
283COT := tbbr
284
Masahiro Yamadaa27c1662017-05-22 12:11:24 +0900285# Use tbbr_oid.h instead of platform_oid.h
Antonio Nino Diazd8d734c2018-09-25 09:41:08 +0100286USE_TBBR_DEFS := 1
Masahiro Yamadaa27c1662017-05-22 12:11:24 +0900287
Jeenu Viswambharan615ff392016-10-24 14:31:51 +0100288# Build verbosity
289V := 0
Soby Mathew043fe9c2017-04-10 22:35:42 +0100290
291# Whether to enable D-Cache early during warm boot. This is usually
292# applicable for platforms wherein interconnect programming is not
293# required to enable cache coherency after warm reset (eg: single cluster
294# platforms).
295WARMBOOT_ENABLE_DCACHE_EARLY := 0
dp-armee3457b2017-05-23 09:32:49 +0100296
Mark Brown64869972022-04-20 18:14:32 +0100297# Default SVE vector length to maximum architected value
298SVE_VECTOR_LEN := 2048
299
Justin Chadwell83e04882019-08-20 11:01:52 +0100300SANITIZE_UB := off
Soby Mathewad042012019-09-25 14:03:41 +0100301
302# For ARMv8.1 (AArch64) platforms, enabling this option selects the spinlock
303# implementation variant using the ARMv8.1-LSE compare-and-swap instruction.
304# Default: disabled
305USE_SPINLOCK_CAS := 0
zelalem-aweked5f45272019-11-12 16:20:17 -0600306
307# Enable Link Time Optimization
308ENABLE_LTO := 0
Max Shvetsovbdf502d2020-02-25 13:56:19 +0000309
Govindraj Raja0264d6c2022-11-21 13:10:40 +0000310# This option will include EL2 registers in cpu context save and restore during
311# EL2 firmware entry/exit. Internal flag not meant for direct setting.
312# Use SPD=spmd and SPMD_SPM_AT_SEL2=1 or ENABLE_RME=1 to enable
313# CTX_INCLUDE_EL2_REGS.
Max Shvetsovbdf502d2020-02-25 13:56:19 +0000314CTX_INCLUDE_EL2_REGS := 0
Manish V Badarkhe75c972a2020-03-22 05:06:38 +0000315
316# Enable Memory tag extension which is supported for architecture greater
317# than Armv8.5-A
318# By default it is set to "no"
319SUPPORT_STACK_MEMTAG := no
Manish V Badarkhe2801ed42020-04-28 04:53:32 +0100320
321# Select workaround for AT speculative behaviour.
johpow019baade32021-07-08 14:14:00 -0500322ERRATA_SPECULATIVE_AT := 0
Varun Wadekar92234852020-06-12 10:11:28 -0700323
Manish Pandey7c6fcb42022-09-27 14:30:34 +0100324# Trap RAS error record access from Non secure
325RAS_TRAP_NS_ERR_REC_ACCESS := 0
Manish V Badarkhead339892020-06-29 10:32:53 +0100326
327# Build option to create cot descriptors using fconf
328COT_DESC_IN_DTB := 0
Manish V Badarkhe3589b702020-07-29 10:58:44 +0100329
Juan Pablo Conde3539c742022-10-25 19:41:02 -0400330# Build option to provide OpenSSL directory path
Manish V Badarkhe3589b702020-07-29 10:58:44 +0100331OPENSSL_DIR := /usr
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500332
Salome Thirot0b35da32022-07-14 16:14:15 +0100333# Select the openssl binary provided in OPENSSL_DIR variable
334ifeq ("$(wildcard ${OPENSSL_DIR}/bin)", "")
335 OPENSSL_BIN_PATH = ${OPENSSL_DIR}/apps
336else
337 OPENSSL_BIN_PATH = ${OPENSSL_DIR}/bin
338endif
339
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500340# Build option to use the SP804 timer instead of the generic one
341USE_SP804_TIMER := 0
Manish V Badarkhe2bb45ff2021-03-16 10:01:27 +0000342
343# Build option to define number of firmware banks, used in firmware update
344# metadata structure.
345NR_OF_FW_BANKS := 2
346
347# Build option to define number of images in firmware bank, used in firmware
348# update metadata structure.
349NR_OF_IMAGES_IN_FW_BANK := 1
Manish V Badarkhe99575e42021-06-25 23:28:59 +0100350
351# Disable Firmware update support by default
352PSA_FWU_SUPPORT := 0
Manish V Badarkhe20df29c2021-07-02 09:10:56 +0100353
Manish V Badarkhe191a5fc2022-03-02 12:06:35 +0000354# Dynamic Root of Trust for Measurement support
355DRTM_SUPPORT := 0
Okash Khawaja037b56e2022-11-04 12:38:01 +0000356
357# Check platform if cache management operations should be performed.
358# Disabled by default.
359CONDITIONAL_CMO := 0
Raghu Krishnamurthy7f046c12023-02-25 13:26:10 -0800360
361# By default, disable SPMD Logical partitions
362ENABLE_SPMD_LP := 0
Manish V Badarkhe78e14f82023-09-06 09:08:28 +0100363
364# By default, disable PSA crypto (use MbedTLS legacy crypto API).
365PSA_CRYPTO := 0
Sandrine Bailleuxf57e2032023-10-11 08:38:00 +0200366
367# getc() support from the console(s).
368# Disabled by default because it constitutes an attack vector into TF-A. It
369# should only be enabled if there is a use case for it.
370ENABLE_CONSOLE_GETC := 0
Arvind Ram Prakash8bd27c92023-08-15 16:28:06 -0500371
372# Build option to disable EL2 when it is not used.
373# Most platforms switch from EL3 to NS-EL2 and hence the unused NS-EL2
374# functions must be enabled by platforms if they require it.
375# Disabled by default.
376INIT_UNUSED_NS_EL2 := 0
Arvind Ram Prakash4851b492023-10-06 14:35:21 -0500377
378# Disable including MPAM EL2 registers in context by default since currently
379# it's only enabled for NS world
380CTX_INCLUDE_MPAM_REGS := 0
Juan Pablo Condeb5ec1382023-11-08 16:14:28 -0600381
382# Enable context memory usage reporting during BL31 setup.
383PLATFORM_REPORT_CTX_MEM_USE := 0