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Jiafei Pan46367ad2018-03-02 07:23:30 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <common/bl_common.h>
10#include <common/interrupt_props.h>
11#include <drivers/arm/gicv2.h>
12#include <drivers/console.h>
13#include <lib/mmio.h>
Antonio Nino Diaz53dec732018-09-25 14:54:23 +010014
Jiafei Pan46367ad2018-03-02 07:23:30 +000015#include "ls_16550.h"
16#include "plat_ls.h"
17#include "soc.h"
18
Jiafei Pan46367ad2018-03-02 07:23:30 +000019/*
20 * Placeholder variables for copying the arguments that have been passed to
21 * BL31 from BL2.
22 */
23static entry_point_info_t bl32_image_ep_info;
24static entry_point_info_t bl33_image_ep_info;
25
Antonio Nino Diaz53dec732018-09-25 14:54:23 +010026static const interrupt_prop_t g0_interrupt_props[] = {
27 INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY,
28 GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL),
Jiafei Pan46367ad2018-03-02 07:23:30 +000029};
30
31gicv2_driver_data_t ls_gic_data = {
32 .gicd_base = GICD_BASE,
33 .gicc_base = GICC_BASE,
Antonio Nino Diaz53dec732018-09-25 14:54:23 +010034 .interrupt_props = g0_interrupt_props,
35 .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props),
Jiafei Pan46367ad2018-03-02 07:23:30 +000036};
37
38
39/*******************************************************************************
40 * Return a pointer to the 'entry_point_info' structure of the next image for the
41 * security state specified. BL33 corresponds to the non-secure image type
42 * while BL32 corresponds to the secure image type. A NULL pointer is returned
43 * if the image does not exist.
44 ******************************************************************************/
45entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
46{
47 entry_point_info_t *next_image_info;
48
49 assert(sec_state_is_valid(type));
50 next_image_info = (type == NON_SECURE)
51 ? &bl33_image_ep_info : &bl32_image_ep_info;
52
53 if (next_image_info->pc)
54 return next_image_info;
55 else
56 return NULL;
57}
58
59/*******************************************************************************
60 * Perform any BL31 early platform setup common to Layerscape platforms.
61 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
John Tsichritzisd653d332018-09-14 10:34:57 +010062 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
Jiafei Pan46367ad2018-03-02 07:23:30 +000063 * done before the MMU is initialized so that the memory layout can be used
64 * while creating page tables. BL2 has flushed this information to memory, so
65 * we are guaranteed to pick up good data.
66 ******************************************************************************/
67void ls_bl31_early_platform_setup(void *from_bl2,
68 void *plat_params_from_bl2)
69{
70 static console_ls_16550_t console;
71
72 /* Initialize the console to provide early debug support */
73 console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK,
74 LS_TF_UART_BAUDRATE, &console);
75#if RESET_TO_BL31
76 /* There are no parameters from BL2 if BL31 is a reset vector */
77 assert(from_bl2 == NULL);
78 assert(plat_params_from_bl2 == NULL);
79
80#ifdef BL32_BASE
81 /* Populate entry point information for BL32 */
82 SET_PARAM_HEAD(&bl32_image_ep_info,
83 PARAM_EP,
84 VERSION_1,
85 0);
86 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
87 bl32_image_ep_info.pc = BL32_BASE;
88 bl32_image_ep_info.spsr = ls_get_spsr_for_bl32_entry();
89#endif /* BL32_BASE */
90
91 /* Populate entry point information for BL33 */
92 SET_PARAM_HEAD(&bl33_image_ep_info,
93 PARAM_EP,
94 VERSION_1,
95 0);
96 /*
97 * Tell BL31 where the non-trusted software image
98 * is located and the entry state information
99 */
100 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
101
102 bl33_image_ep_info.spsr = ls_get_spsr_for_bl33_entry();
103 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
104
105#else /* RESET_TO_BL31 */
106
107 /*
108 * In debug builds, we pass a special value in 'plat_params_from_bl2'
109 * to verify platform parameters from BL2 to BL31.
110 * In release builds, it's not used.
111 */
112 assert(((unsigned long long)plat_params_from_bl2) ==
113 LS_BL31_PLAT_PARAM_VAL);
114
115 /*
116 * Check params passed from BL2 should not be NULL,
117 */
118 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
119
120 assert(params_from_bl2 != NULL);
121 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
122 assert(params_from_bl2->h.version >= VERSION_2);
123
124 bl_params_node_t *bl_params = params_from_bl2->head;
125
126 /*
127 * Copy BL33 and BL32 (if present), entry point information.
128 * They are stored in Secure RAM, in BL2's address space.
129 */
130 while (bl_params) {
131 if (bl_params->image_id == BL32_IMAGE_ID)
132 bl32_image_ep_info = *bl_params->ep_info;
133
134 if (bl_params->image_id == BL33_IMAGE_ID)
135 bl33_image_ep_info = *bl_params->ep_info;
136
137 bl_params = bl_params->next_params_info;
138 }
139
140 if (bl33_image_ep_info.pc == 0)
141 panic();
142
143#endif /* RESET_TO_BL31 */
144}
145
146/*******************************************************************************
147 * Perform any BL31 platform setup common to Layerscape platforms
148 ******************************************************************************/
149void ls_bl31_platform_setup(void)
150{
151 uint32_t gicc_base, gicd_base;
152
153 NOTICE(FIRMWARE_WELCOME_STR_LS1043_BL31);
154 /* Initialize the GIC driver, cpu and distributor interfaces */
155 get_gic_offset(&gicc_base, &gicd_base);
156 ls_gic_data.gicd_base = (uintptr_t)gicd_base;
157 ls_gic_data.gicc_base = (uintptr_t)gicc_base;
158 gicv2_driver_init(&ls_gic_data);
159 gicv2_distif_init();
160 gicv2_pcpu_distif_init();
161 gicv2_cpuif_enable();
162
163#if RESET_TO_BL31
164 /*
165 * Do initial security configuration to allow DRAM/device access
166 * (if earlier BL has not already done so).
167 */
168 plat_ls_security_setup();
169
170#endif /* RESET_TO_BL31 */
171
172 /* Enable and initialize the System level generic timer */
173 mmio_write_32(LS1043_SYS_CNTCTL_BASE + CNTCR_OFF,
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100174 CNTCR_FCREQ(0U) | CNTCR_EN);
Jiafei Pan46367ad2018-03-02 07:23:30 +0000175
176 VERBOSE("Leave arm_bl31_platform_setup\n");
177}
178
179/*******************************************************************************
180 * Perform any BL31 platform runtime setup prior to BL31 exit common to Layerscape
181 * platforms
182 ******************************************************************************/
183void ls_bl31_plat_runtime_setup(void)
184{
185 static console_ls_16550_t console;
186
187 /* Initialize the runtime console */
188 console_ls_16550_register(PLAT_LS1043_UART_BASE, PLAT_LS1043_UART_CLOCK,
189 PLAT_LS1043_UART_BAUDRATE, &console);
190}
191
192void bl31_platform_setup(void)
193{
194 ls_bl31_platform_setup();
195}
196
197void bl31_plat_runtime_setup(void)
198{
199 ls_bl31_plat_runtime_setup();
200}
201
202/*******************************************************************************
203 * Perform the very early platform specific architectural setup shared between
204 * Layerscape platforms. This only does basic initialization. Later
205 * architectural setup (bl31_arch_setup()) does not do anything platform
206 * specific.
207 ******************************************************************************/
208void ls_bl31_plat_arch_setup(void)
209{
210 ls_setup_page_tables(BL31_BASE,
211 BL31_END - BL31_BASE,
212 BL_CODE_BASE,
213 BL_CODE_END,
214 BL_RO_DATA_BASE,
215 BL_RO_DATA_END
216#if USE_COHERENT_MEM
217 , BL_COHERENT_RAM_BASE,
218 BL_COHERENT_RAM_END
219#endif
220 );
221 enable_mmu_el3(0);
222}
223
224void bl31_plat_arch_setup(void)
225{
226 ls_bl31_plat_arch_setup();
227}