blob: 1933b8704f84b4f63853721ac9ef3e22f6aea9c5 [file] [log] [blame]
Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Kalyani Akula6ebe4832020-11-22 22:42:10 -08002 * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
7/* ZynqMP power management enums and defines */
8
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00009#ifndef PM_DEFS_H
10#define PM_DEFS_H
Soren Brinkmann76fcae32016-03-06 20:16:27 -080011
12/*********************************************************************
13 * Macro definitions
14 ********************************************************************/
15
16/*
17 * Version number is a 32bit value, like:
18 * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR
19 */
Jolly Shahabee2a42018-02-07 15:37:01 -080020#define PM_VERSION_MAJOR 1
Rajan Vaja720fd9d2018-10-05 04:42:57 -070021#define PM_VERSION_MINOR 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -080022
23#define PM_VERSION ((PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR)
24
Ronak Jain325bad12021-12-21 01:39:59 -080025/**
26 * PM API versions
27 */
28/* Expected version of firmware APIs */
29#define FW_API_BASE_VERSION (1U)
30/* Expected version of firmware API for feature check */
31#define FW_API_VERSION_2 (2U)
32/* Version of APIs implemented in ATF */
33#define ATF_API_BASE_VERSION (1U)
34
Soren Brinkmann76fcae32016-03-06 20:16:27 -080035/* Capabilities for RAM */
36#define PM_CAP_ACCESS 0x1U
37#define PM_CAP_CONTEXT 0x2U
38
39#define MAX_LATENCY (~0U)
40#define MAX_QOS 100U
41
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020042/* State arguments of the self suspend */
43#define PM_STATE_CPU_IDLE 0x0U
44#define PM_STATE_SUSPEND_TO_RAM 0xFU
45
Venkatesh Yadav Abbarapu7ace4af2020-11-23 04:26:54 -080046#define EM_FUNID_NUM_MASK 0xF0000U
Ronak Jain325bad12021-12-21 01:39:59 -080047
48#define PM_GET_CALLBACK_DATA 0xa01
49#define PM_SET_SUSPEND_MODE 0xa02
50#define PM_GET_TRUSTZONE_VERSION 0xa03
51
Soren Brinkmann76fcae32016-03-06 20:16:27 -080052/*********************************************************************
53 * Enum definitions
54 ********************************************************************/
55
56enum pm_api_id {
57 /* Miscellaneous API functions: */
58 PM_GET_API_VERSION = 1, /* Do not change or move */
59 PM_SET_CONFIGURATION,
60 PM_GET_NODE_STATUS,
61 PM_GET_OP_CHARACTERISTIC,
62 PM_REGISTER_NOTIFIER,
63 /* API for suspending of PUs: */
64 PM_REQ_SUSPEND,
65 PM_SELF_SUSPEND,
66 PM_FORCE_POWERDOWN,
67 PM_ABORT_SUSPEND,
68 PM_REQ_WAKEUP,
69 PM_SET_WAKEUP_SOURCE,
70 PM_SYSTEM_SHUTDOWN,
71 /* API for managing PM slaves: */
72 PM_REQ_NODE,
73 PM_RELEASE_NODE,
74 PM_SET_REQUIREMENT,
75 PM_SET_MAX_LATENCY,
76 /* Direct control API functions: */
77 PM_RESET_ASSERT,
78 PM_RESET_GET_STATUS,
79 PM_MMIO_WRITE,
80 PM_MMIO_READ,
Filip Drazicca1e0af2017-03-16 16:56:53 +010081 PM_INIT_FINALIZE,
Nava kishore Manne68d460c2016-08-20 23:18:09 +053082 PM_FPGA_LOAD,
83 PM_FPGA_GET_STATUS,
Siva Durga Prasad Paladugu16427d12016-08-24 11:45:47 +053084 PM_GET_CHIPID,
Rajan Vaja670bec02018-01-18 22:54:07 -080085 PM_SECURE_RSA_AES,
86 PM_SECURE_SHA,
87 PM_SECURE_RSA,
Rajan Vaja83687612018-01-17 02:39:20 -080088 PM_PINCTRL_REQUEST,
89 PM_PINCTRL_RELEASE,
90 PM_PINCTRL_GET_FUNCTION,
91 PM_PINCTRL_SET_FUNCTION,
92 PM_PINCTRL_CONFIG_PARAM_GET,
93 PM_PINCTRL_CONFIG_PARAM_SET,
Rajan Vaja5529a012018-01-17 02:39:23 -080094 PM_IOCTL,
Rajan Vaja35116132018-01-17 02:39:25 -080095 /* API to query information from firmware */
96 PM_QUERY_DATA,
97 /* Clock control API functions */
98 PM_CLOCK_ENABLE,
99 PM_CLOCK_DISABLE,
100 PM_CLOCK_GETSTATE,
101 PM_CLOCK_SETDIVIDER,
102 PM_CLOCK_GETDIVIDER,
103 PM_CLOCK_SETRATE,
104 PM_CLOCK_GETRATE,
105 PM_CLOCK_SETPARENT,
106 PM_CLOCK_GETPARENT,
Siva Durga Prasad Paladugua4ed4b22018-04-30 20:06:58 +0530107 PM_SECURE_IMAGE,
Siva Durga Prasad Paladugu7c6516a2018-09-04 17:41:34 +0530108 /* FPGA PL Readback */
109 PM_FPGA_READ,
Siva Durga Prasad Paladugu8bd905b2018-09-04 18:05:50 +0530110 PM_SECURE_AES,
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800111 /* PLL control API functions */
112 PM_PLL_SET_PARAMETER,
Jolly Shahcb2f45d2019-01-04 11:28:38 -0800113 PM_PLL_GET_PARAMETER,
Jolly Shah1f0d5852019-01-04 11:32:31 -0800114 PM_PLL_SET_MODE,
Jolly Shah141421e2019-01-04 11:35:48 -0800115 PM_PLL_GET_MODE,
Kalyani Akula6ebe4832020-11-22 22:42:10 -0800116 /* PM Register Access API */
117 PM_REGISTER_ACCESS,
VNSL Durgadeb1a362020-11-23 04:46:04 -0800118 PM_EFUSE_ACCESS,
Nava kishore Manne2af6d532022-01-13 13:29:36 +0530119 PM_FPGA_GET_VERSION,
120 PM_FPGA_GET_FEATURE_LIST,
Ronak Jain325bad12021-12-21 01:39:59 -0800121 PM_FEATURE_CHECK = 63,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800122 PM_API_MAX
123};
124
125enum pm_node_id {
126 NODE_UNKNOWN = 0,
127 NODE_APU,
128 NODE_APU_0,
129 NODE_APU_1,
130 NODE_APU_2,
131 NODE_APU_3,
132 NODE_RPU,
133 NODE_RPU_0,
134 NODE_RPU_1,
Rajan Vaja670bec02018-01-18 22:54:07 -0800135 NODE_PLD,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800136 NODE_FPD,
137 NODE_OCM_BANK_0,
138 NODE_OCM_BANK_1,
139 NODE_OCM_BANK_2,
140 NODE_OCM_BANK_3,
141 NODE_TCM_0_A,
142 NODE_TCM_0_B,
143 NODE_TCM_1_A,
144 NODE_TCM_1_B,
145 NODE_L2,
146 NODE_GPU_PP_0,
147 NODE_GPU_PP_1,
148 NODE_USB_0,
149 NODE_USB_1,
150 NODE_TTC_0,
151 NODE_TTC_1,
152 NODE_TTC_2,
153 NODE_TTC_3,
154 NODE_SATA,
155 NODE_ETH_0,
156 NODE_ETH_1,
157 NODE_ETH_2,
158 NODE_ETH_3,
159 NODE_UART_0,
160 NODE_UART_1,
161 NODE_SPI_0,
162 NODE_SPI_1,
163 NODE_I2C_0,
164 NODE_I2C_1,
165 NODE_SD_0,
166 NODE_SD_1,
167 NODE_DP,
168 NODE_GDMA,
169 NODE_ADMA,
170 NODE_NAND,
171 NODE_QSPI,
172 NODE_GPIO,
173 NODE_CAN_0,
174 NODE_CAN_1,
Mirela Simonoviccd165822017-01-30 17:44:00 +0100175 NODE_EXTERN,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800176 NODE_APLL,
177 NODE_VPLL,
178 NODE_DPLL,
179 NODE_RPLL,
180 NODE_IOPLL,
181 NODE_DDR,
Mirela Simonovic0ff06ce2016-06-07 18:15:40 +0200182 NODE_IPI_APU,
Mirela Simonovic9b984be2016-06-17 16:17:23 +0200183 NODE_IPI_RPU_0,
Filip Drazic35e99e22016-07-26 12:07:05 +0200184 NODE_GPU,
185 NODE_PCIE,
186 NODE_PCAP,
187 NODE_RTC,
Rajan Vaja670bec02018-01-18 22:54:07 -0800188 NODE_LPD,
189 NODE_VCU,
190 NODE_IPI_RPU_1,
191 NODE_IPI_PL_0,
192 NODE_IPI_PL_1,
193 NODE_IPI_PL_2,
194 NODE_IPI_PL_3,
195 NODE_PL,
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800196 NODE_GEM_TSU,
197 NODE_SWDT_0,
198 NODE_SWDT_1,
199 NODE_CSU,
200 NODE_PJTAG,
201 NODE_TRACE,
202 NODE_TESTSCAN,
203 NODE_PMU,
204 NODE_MAX,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800205};
206
207enum pm_request_ack {
208 REQ_ACK_NO = 1,
209 REQ_ACK_BLOCKING,
210 REQ_ACK_NON_BLOCKING,
211};
212
213enum pm_abort_reason {
214 ABORT_REASON_WKUP_EVENT = 100,
215 ABORT_REASON_PU_BUSY,
216 ABORT_REASON_NO_PWRDN,
217 ABORT_REASON_UNKNOWN,
218};
219
220enum pm_suspend_reason {
221 SUSPEND_REASON_PU_REQ = 201,
222 SUSPEND_REASON_ALERT,
223 SUSPEND_REASON_SYS_SHUTDOWN,
224};
225
226enum pm_ram_state {
227 PM_RAM_STATE_OFF = 1,
228 PM_RAM_STATE_RETENTION,
229 PM_RAM_STATE_ON,
230};
231
232enum pm_opchar_type {
233 PM_OPCHAR_TYPE_POWER = 1,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800234 PM_OPCHAR_TYPE_TEMP,
Anes Hadziahmetagic92aee012016-05-12 16:17:30 +0200235 PM_OPCHAR_TYPE_LATENCY,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800236};
237
238/**
239 * @PM_RET_SUCCESS: success
Davorin Mista8e059012018-08-24 17:09:06 +0200240 * @PM_RET_ERROR_ARGS: illegal arguments provided (deprecated)
241 * @PM_RET_ERROR_NOTSUPPORTED: feature not supported (deprecated)
242 * @PM_RET_ERROR_INTERNAL: internal error
243 * @PM_RET_ERROR_CONFLICT: conflict
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800244 * @PM_RET_ERROR_ACCESS: access rights violation
Davorin Mista8e059012018-08-24 17:09:06 +0200245 * @PM_RET_ERROR_INVALID_NODE: invalid node
246 * @PM_RET_ERROR_DOUBLE_REQ: duplicate request for same node
247 * @PM_RET_ERROR_ABORT_SUSPEND: suspend procedure has been aborted
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800248 * @PM_RET_ERROR_TIMEOUT: timeout in communication with PMU
Davorin Mista8e059012018-08-24 17:09:06 +0200249 * @PM_RET_ERROR_NODE_USED: node is already in use
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800250 */
251enum pm_ret_status {
252 PM_RET_SUCCESS,
Davorin Mista8e059012018-08-24 17:09:06 +0200253 PM_RET_ERROR_ARGS = 1,
254 PM_RET_ERROR_NOTSUPPORTED = 4,
255 PM_RET_ERROR_INTERNAL = 2000,
256 PM_RET_ERROR_CONFLICT = 2001,
257 PM_RET_ERROR_ACCESS = 2002,
258 PM_RET_ERROR_INVALID_NODE = 2003,
259 PM_RET_ERROR_DOUBLE_REQ = 2004,
260 PM_RET_ERROR_ABORT_SUSPEND = 2005,
261 PM_RET_ERROR_TIMEOUT = 2006,
Ronak Jain325bad12021-12-21 01:39:59 -0800262 PM_RET_ERROR_NODE_USED = 2007,
263 PM_RET_ERROR_NO_FEATURE = 2008
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800264};
265
266/**
267 * @PM_INITIAL_BOOT: boot is a fresh system startup
268 * @PM_RESUME: boot is a resume
269 * @PM_BOOT_ERROR: error, boot cause cannot be identified
270 */
271enum pm_boot_status {
272 PM_INITIAL_BOOT,
273 PM_RESUME,
274 PM_BOOT_ERROR,
275};
276
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530277/**
278 * @PMF_SHUTDOWN_TYPE_SHUTDOWN: shutdown
279 * @PMF_SHUTDOWN_TYPE_RESET: reset/reboot
280 * @PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY: set the shutdown/reboot scope
281 */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700282enum pm_shutdown_type {
283 PMF_SHUTDOWN_TYPE_SHUTDOWN,
284 PMF_SHUTDOWN_TYPE_RESET,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530285 PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY,
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700286};
287
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530288/**
289 * @PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM: shutdown/reboot APU subsystem only
290 * @PMF_SHUTDOWN_SUBTYPE_PS_ONLY: shutdown/reboot entire PS (but not PL)
291 * @PMF_SHUTDOWN_SUBTYPE_SYSTEM: shutdown/reboot entire system
292 */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700293enum pm_shutdown_subtype {
294 PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM,
295 PMF_SHUTDOWN_SUBTYPE_PS_ONLY,
296 PMF_SHUTDOWN_SUBTYPE_SYSTEM,
297};
298
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800299/**
300 * @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL
301 * @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL
302 * @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL
303 * @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input
304 * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode
305 * @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize
306 * @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting
307 * @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control
308 * @PM_PLL_PARAM_CP: PLL charge pump control
309 * @PM_PLL_PARAM_RES: PLL loop filter resistor control
310 */
311enum pm_pll_param {
312 PM_PLL_PARAM_DIV2,
313 PM_PLL_PARAM_FBDIV,
314 PM_PLL_PARAM_DATA,
315 PM_PLL_PARAM_PRE_SRC,
316 PM_PLL_PARAM_POST_SRC,
317 PM_PLL_PARAM_LOCK_DLY,
318 PM_PLL_PARAM_LOCK_CNT,
319 PM_PLL_PARAM_LFHF,
320 PM_PLL_PARAM_CP,
321 PM_PLL_PARAM_RES,
322 PM_PLL_PARAM_MAX,
323};
324
Jolly Shah1f0d5852019-01-04 11:32:31 -0800325/**
326 * @PM_PLL_MODE_RESET: PLL is in reset (not locked)
327 * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode
328 * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode
329 */
330enum pm_pll_mode {
331 PM_PLL_MODE_RESET,
332 PM_PLL_MODE_INTEGER,
333 PM_PLL_MODE_FRACTIONAL,
334 PM_PLL_MODE_MAX,
335};
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800336
Jolly Shah8b4c4c72019-01-04 11:49:46 -0800337/**
338 * @PM_CLOCK_DIV0_ID: Clock divider 0
339 * @PM_CLOCK_DIV1_ID: Clock divider 1
340 */
341enum pm_clock_div_id {
342 PM_CLOCK_DIV0_ID,
343 PM_CLOCK_DIV1_ID,
344};
345
Venkatesh Yadav Abbarapu7ace4af2020-11-23 04:26:54 -0800346/**
347 * EM API IDs
348 */
349enum em_api_id {
350 EM_SET_ACTION = 1,
351 EM_REMOVE_ACTION,
352 EM_SEND_ERRORS,
353};
354
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000355#endif /* PM_DEFS_H */