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Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
Antonio Nino Diaz3f518922018-01-05 11:30:36 +00002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00007#include <assert.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00008#include <errno.h>
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01009#include <stdbool.h>
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010010#include <stdint.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000011#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012
13#include <platform_def.h>
14
15#include <arch_helpers.h>
16#include <common/debug.h>
17#include <lib/utils_def.h>
18#include <lib/xlat_tables/xlat_tables_defs.h>
19#include <lib/xlat_tables/xlat_tables_v2.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010020
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000021#include "xlat_tables_private.h"
22
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +010023/* Helper function that cleans the data cache only if it is enabled. */
Varun Wadekar6bd85492019-01-30 08:31:07 -080024static inline __attribute__((unused)) void xlat_clean_dcache_range(uintptr_t addr, size_t size)
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +010025{
26 if (is_dcache_enabled())
27 clean_dcache_range(addr, size);
28}
29
Antonio Nino Diazac998032017-02-27 17:23:54 +000030#if PLAT_XLAT_TABLES_DYNAMIC
31
32/*
33 * The following functions assume that they will be called using subtables only.
34 * The base table can't be unmapped, so it is not needed to do any special
35 * handling for it.
36 */
37
38/*
39 * Returns the index of the array corresponding to the specified translation
40 * table.
41 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010042static int xlat_table_get_index(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000043{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010044 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000045 if (ctx->tables[i] == table)
46 return i;
47
48 /*
49 * Maybe we were asked to get the index of the base level table, which
50 * should never happen.
51 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010052 assert(false);
Antonio Nino Diazac998032017-02-27 17:23:54 +000053
54 return -1;
55}
56
57/* Returns a pointer to an empty translation table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010058static uint64_t *xlat_table_get_empty(const xlat_ctx_t *ctx)
Antonio Nino Diazac998032017-02-27 17:23:54 +000059{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010060 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000061 if (ctx->tables_mapped_regions[i] == 0)
62 return ctx->tables[i];
63
64 return NULL;
65}
66
67/* Increments region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010068static void xlat_table_inc_regions_count(const xlat_ctx_t *ctx,
69 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000070{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010071 int idx = xlat_table_get_index(ctx, table);
72
73 ctx->tables_mapped_regions[idx]++;
Antonio Nino Diazac998032017-02-27 17:23:54 +000074}
75
76/* Decrements region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010077static void xlat_table_dec_regions_count(const xlat_ctx_t *ctx,
78 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000079{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010080 int idx = xlat_table_get_index(ctx, table);
81
82 ctx->tables_mapped_regions[idx]--;
Antonio Nino Diazac998032017-02-27 17:23:54 +000083}
84
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010085/* Returns 0 if the specified table isn't empty, otherwise 1. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010086static bool xlat_table_is_empty(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000087{
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010088 return ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)] == 0;
Antonio Nino Diazac998032017-02-27 17:23:54 +000089}
90
91#else /* PLAT_XLAT_TABLES_DYNAMIC */
92
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000093/* Returns a pointer to the first empty translation table. */
94static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
95{
96 assert(ctx->next_table < ctx->tables_num);
97
98 return ctx->tables[ctx->next_table++];
99}
100
Antonio Nino Diazac998032017-02-27 17:23:54 +0000101#endif /* PLAT_XLAT_TABLES_DYNAMIC */
102
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100103/*
104 * Returns a block/page table descriptor for the given level and attributes.
105 */
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100106uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100107 unsigned long long addr_pa, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000108{
109 uint64_t desc;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100110 uint32_t mem_type;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000111
112 /* Make sure that the granularity is fine enough to map this address. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100113 assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000114
115 desc = addr_pa;
116 /*
117 * There are different translation table descriptors for level 3 and the
118 * rest.
119 */
120 desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC;
121 /*
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100122 * Always set the access flag, as this library assumes access flag
123 * faults aren't managed.
124 */
125 desc |= LOWER_ATTRS(ACCESS_FLAG);
126 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000127 * Deduce other fields of the descriptor based on the MT_NS and MT_RW
128 * memory region attributes.
129 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100130 desc |= ((attr & MT_NS) != 0U) ? LOWER_ATTRS(NS) : 0U;
131 desc |= ((attr & MT_RW) != 0U) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000132
133 /*
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100134 * Do not allow unprivileged access when the mapping is for a privileged
135 * EL. For translation regimes that do not have mappings for access for
136 * lower exception levels, set AP[2] to AP_NO_ACCESS_UNPRIVILEGED.
137 */
138 if (ctx->xlat_regime == EL1_EL0_REGIME) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100139 if ((attr & MT_USER) != 0U) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100140 /* EL0 mapping requested, so we give User access */
141 desc |= LOWER_ATTRS(AP_ACCESS_UNPRIVILEGED);
142 } else {
143 /* EL1 mapping requested, no User access granted */
144 desc |= LOWER_ATTRS(AP_NO_ACCESS_UNPRIVILEGED);
145 }
146 } else {
Antonio Nino Diaz128de8d2018-08-07 19:59:49 +0100147 assert((ctx->xlat_regime == EL2_REGIME) ||
148 (ctx->xlat_regime == EL3_REGIME));
Antonio Nino Diaz49074492018-04-26 12:59:08 +0100149 desc |= LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100150 }
151
152 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000153 * Deduce shareability domain and executability of the memory region
154 * from the memory type of the attributes (MT_TYPE).
155 *
156 * Data accesses to device memory and non-cacheable normal memory are
157 * coherent for all observers in the system, and correspondingly are
158 * always treated as being Outer Shareable. Therefore, for these 2 types
159 * of memory, it is not strictly needed to set the shareability field
160 * in the translation tables.
161 */
162 mem_type = MT_TYPE(attr);
163 if (mem_type == MT_DEVICE) {
164 desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH);
165 /*
166 * Always map device memory as execute-never.
167 * This is to avoid the possibility of a speculative instruction
168 * fetch, which could be an issue if this memory region
169 * corresponds to a read-sensitive peripheral.
170 */
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100171 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100172
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000173 } else { /* Normal memory */
174 /*
175 * Always map read-write normal memory as execute-never.
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100176 * This library assumes that it is used by software that does
177 * not self-modify its code, therefore R/W memory is reserved
178 * for data storage, which must not be executable.
179 *
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000180 * Note that setting the XN bit here is for consistency only.
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100181 * The function that enables the MMU sets the SCTLR_ELx.WXN bit,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000182 * which makes any writable memory region to be treated as
183 * execute-never, regardless of the value of the XN bit in the
184 * translation table.
185 *
186 * For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100187 * attribute to figure out the value of the XN bit. The actual
188 * XN bit(s) to set in the descriptor depends on the context's
189 * translation regime and the policy applied in
190 * xlat_arch_regime_get_xn_desc().
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000191 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100192 if (((attr & MT_RW) != 0U) || ((attr & MT_EXECUTE_NEVER) != 0U)) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100193 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100194 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000195
196 if (mem_type == MT_MEMORY) {
197 desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH);
198 } else {
199 assert(mem_type == MT_NON_CACHEABLE);
200 desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH);
201 }
202 }
203
204 return desc;
205}
206
207/*
208 * Enumeration of actions that can be made when mapping table entries depending
209 * on the previous value in that entry and information about the region being
210 * mapped.
211 */
212typedef enum {
213
214 /* Do nothing */
215 ACTION_NONE,
216
217 /* Write a block (or page, if in level 3) entry. */
218 ACTION_WRITE_BLOCK_ENTRY,
219
220 /*
221 * Create a new table and write a table entry pointing to it. Recurse
222 * into it for further processing.
223 */
224 ACTION_CREATE_NEW_TABLE,
225
226 /*
227 * There is a table descriptor in this entry, read it and recurse into
228 * that table for further processing.
229 */
230 ACTION_RECURSE_INTO_TABLE,
231
232} action_t;
233
David Pu5619c802019-02-22 02:23:57 -0800234/*
235 * Function that returns the first VA of the table affected by the specified
236 * mmap region.
237 */
238static uintptr_t xlat_tables_find_start_va(mmap_region_t *mm,
239 const uintptr_t table_base_va,
240 const unsigned int level)
241{
242 uintptr_t table_idx_va;
243
244 if (mm->base_va > table_base_va) {
245 /* Find the first index of the table affected by the region. */
246 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
247 } else {
248 /* Start from the beginning of the table. */
249 table_idx_va = table_base_va;
250 }
251
252 return table_idx_va;
253}
254
255/*
256 * Function that returns table index for the given VA and level arguments.
257 */
258static inline unsigned int xlat_tables_va_to_index(const uintptr_t table_base_va,
259 const uintptr_t va,
260 const unsigned int level)
261{
262 return (unsigned int)((va - table_base_va) >> XLAT_ADDR_SHIFT(level));
263}
264
Antonio Nino Diazac998032017-02-27 17:23:54 +0000265#if PLAT_XLAT_TABLES_DYNAMIC
266
267/*
David Pu1507d412019-02-22 02:15:57 -0800268 * From the given arguments, it decides which action to take when unmapping the
269 * specified region.
270 */
271static action_t xlat_tables_unmap_region_action(const mmap_region_t *mm,
272 const uintptr_t table_idx_va, const uintptr_t table_idx_end_va,
273 const unsigned int level, const uint64_t desc_type)
274{
275 action_t action;
276 uintptr_t region_end_va = mm->base_va + mm->size - 1U;
277
278 if ((mm->base_va <= table_idx_va) &&
279 (region_end_va >= table_idx_end_va)) {
280 /* Region covers all block */
281
282 if (level == 3U) {
283 /*
284 * Last level, only page descriptors allowed,
285 * erase it.
286 */
287 assert(desc_type == PAGE_DESC);
288
289 action = ACTION_WRITE_BLOCK_ENTRY;
290 } else {
291 /*
292 * Other levels can have table descriptors. If
293 * so, recurse into it and erase descriptors
294 * inside it as needed. If there is a block
295 * descriptor, just erase it. If an invalid
296 * descriptor is found, this table isn't
297 * actually mapped, which shouldn't happen.
298 */
299 if (desc_type == TABLE_DESC) {
300 action = ACTION_RECURSE_INTO_TABLE;
301 } else {
302 assert(desc_type == BLOCK_DESC);
303 action = ACTION_WRITE_BLOCK_ENTRY;
304 }
305 }
306
307 } else if ((mm->base_va <= table_idx_end_va) ||
308 (region_end_va >= table_idx_va)) {
309 /*
310 * Region partially covers block.
311 *
312 * It can't happen in level 3.
313 *
314 * There must be a table descriptor here, if not there
315 * was a problem when mapping the region.
316 */
317 assert(level < 3U);
318 assert(desc_type == TABLE_DESC);
319
320 action = ACTION_RECURSE_INTO_TABLE;
321 } else {
322 /* The region doesn't cover the block at all */
323 action = ACTION_NONE;
324 }
325
326 return action;
327}
328/*
Antonio Nino Diazac998032017-02-27 17:23:54 +0000329 * Recursive function that writes to the translation tables and unmaps the
330 * specified region.
331 */
332static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
333 const uintptr_t table_base_va,
334 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100335 const unsigned int table_entries,
Varun Wadekar66231d12017-06-07 09:57:42 -0700336 const unsigned int level)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000337{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100338 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diazac998032017-02-27 17:23:54 +0000339
340 uint64_t *subtable;
341 uint64_t desc;
342
343 uintptr_t table_idx_va;
344 uintptr_t table_idx_end_va; /* End VA of this entry */
345
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100346 uintptr_t region_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000347
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100348 unsigned int table_idx;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000349
David Pu5619c802019-02-22 02:23:57 -0800350 table_idx_va = xlat_tables_find_start_va(mm, table_base_va, level);
351 table_idx = xlat_tables_va_to_index(table_base_va, table_idx_va, level);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000352
353 while (table_idx < table_entries) {
354
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100355 table_idx_end_va = table_idx_va + XLAT_BLOCK_SIZE(level) - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000356
357 desc = table_base[table_idx];
358 uint64_t desc_type = desc & DESC_MASK;
359
David Pu1507d412019-02-22 02:15:57 -0800360 action_t action = xlat_tables_unmap_region_action(mm,
361 table_idx_va, table_idx_end_va, level,
362 desc_type);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000363
364 if (action == ACTION_WRITE_BLOCK_ENTRY) {
365
366 table_base[table_idx] = INVALID_DESC;
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +0100367 xlat_arch_tlbi_va(table_idx_va, ctx->xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000368
369 } else if (action == ACTION_RECURSE_INTO_TABLE) {
370
371 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
372
373 /* Recurse to write into subtable */
374 xlat_tables_unmap_region(ctx, mm, table_idx_va,
375 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100376 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100377#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
378 xlat_clean_dcache_range((uintptr_t)subtable,
379 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
380#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000381 /*
382 * If the subtable is now empty, remove its reference.
383 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100384 if (xlat_table_is_empty(ctx, subtable)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000385 table_base[table_idx] = INVALID_DESC;
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +0100386 xlat_arch_tlbi_va(table_idx_va,
387 ctx->xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000388 }
389
390 } else {
391 assert(action == ACTION_NONE);
392 }
393
394 table_idx++;
395 table_idx_va += XLAT_BLOCK_SIZE(level);
396
397 /* If reached the end of the region, exit */
398 if (region_end_va <= table_idx_va)
399 break;
400 }
401
402 if (level > ctx->base_level)
403 xlat_table_dec_regions_count(ctx, table_base);
404}
405
406#endif /* PLAT_XLAT_TABLES_DYNAMIC */
407
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000408/*
409 * From the given arguments, it decides which action to take when mapping the
410 * specified region.
411 */
412static action_t xlat_tables_map_region_action(const mmap_region_t *mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100413 unsigned int desc_type, unsigned long long dest_pa,
414 uintptr_t table_entry_base_va, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000415{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100416 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000417 uintptr_t table_entry_end_va =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100418 table_entry_base_va + XLAT_BLOCK_SIZE(level) - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000419
420 /*
421 * The descriptor types allowed depend on the current table level.
422 */
423
424 if ((mm->base_va <= table_entry_base_va) &&
425 (mm_end_va >= table_entry_end_va)) {
426
427 /*
428 * Table entry is covered by region
429 * --------------------------------
430 *
431 * This means that this table entry can describe the whole
432 * translation with this granularity in principle.
433 */
434
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100435 if (level == 3U) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000436 /*
437 * Last level, only page descriptors are allowed.
438 */
439 if (desc_type == PAGE_DESC) {
440 /*
441 * There's another region mapped here, don't
442 * overwrite.
443 */
444 return ACTION_NONE;
445 } else {
446 assert(desc_type == INVALID_DESC);
447 return ACTION_WRITE_BLOCK_ENTRY;
448 }
449
450 } else {
451
452 /*
453 * Other levels. Table descriptors are allowed. Block
454 * descriptors too, but they have some limitations.
455 */
456
457 if (desc_type == TABLE_DESC) {
458 /* There's already a table, recurse into it. */
459 return ACTION_RECURSE_INTO_TABLE;
460
461 } else if (desc_type == INVALID_DESC) {
462 /*
463 * There's nothing mapped here, create a new
464 * entry.
465 *
466 * Check if the destination granularity allows
467 * us to use a block descriptor or we need a
468 * finer table for it.
469 *
470 * Also, check if the current level allows block
471 * descriptors. If not, create a table instead.
472 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100473 if (((dest_pa & XLAT_BLOCK_MASK(level)) != 0U)
474 || (level < MIN_LVL_BLOCK_DESC) ||
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100475 (mm->granularity < XLAT_BLOCK_SIZE(level)))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000476 return ACTION_CREATE_NEW_TABLE;
477 else
478 return ACTION_WRITE_BLOCK_ENTRY;
479
480 } else {
481 /*
482 * There's another region mapped here, don't
483 * overwrite.
484 */
485 assert(desc_type == BLOCK_DESC);
486
487 return ACTION_NONE;
488 }
489 }
490
491 } else if ((mm->base_va <= table_entry_end_va) ||
492 (mm_end_va >= table_entry_base_va)) {
493
494 /*
495 * Region partially covers table entry
496 * -----------------------------------
497 *
498 * This means that this table entry can't describe the whole
499 * translation, a finer table is needed.
500
501 * There cannot be partial block overlaps in level 3. If that
502 * happens, some of the preliminary checks when adding the
503 * mmap region failed to detect that PA and VA must at least be
504 * aligned to PAGE_SIZE.
505 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100506 assert(level < 3U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000507
508 if (desc_type == INVALID_DESC) {
509 /*
510 * The block is not fully covered by the region. Create
511 * a new table, recurse into it and try to map the
512 * region with finer granularity.
513 */
514 return ACTION_CREATE_NEW_TABLE;
515
516 } else {
517 assert(desc_type == TABLE_DESC);
518 /*
519 * The block is not fully covered by the region, but
520 * there is already a table here. Recurse into it and
521 * try to map with finer granularity.
522 *
523 * PAGE_DESC for level 3 has the same value as
524 * TABLE_DESC, but this code can't run on a level 3
525 * table because there can't be overlaps in level 3.
526 */
527 return ACTION_RECURSE_INTO_TABLE;
528 }
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100529 } else {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000530
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100531 /*
532 * This table entry is outside of the region specified in the
533 * arguments, don't write anything to it.
534 */
535 return ACTION_NONE;
536 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000537}
538
539/*
540 * Recursive function that writes to the translation tables and maps the
Antonio Nino Diazac998032017-02-27 17:23:54 +0000541 * specified region. On success, it returns the VA of the last byte that was
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100542 * successfully mapped. On error, it returns the VA of the next entry that
Antonio Nino Diazac998032017-02-27 17:23:54 +0000543 * should have been mapped.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000544 */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000545static uintptr_t xlat_tables_map_region(xlat_ctx_t *ctx, mmap_region_t *mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100546 uintptr_t table_base_va,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000547 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100548 unsigned int table_entries,
549 unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000550{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100551 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000552
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100553 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000554
555 uintptr_t table_idx_va;
556 unsigned long long table_idx_pa;
557
558 uint64_t *subtable;
559 uint64_t desc;
560
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100561 unsigned int table_idx;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000562
David Pu5619c802019-02-22 02:23:57 -0800563 table_idx_va = xlat_tables_find_start_va(mm, table_base_va, level);
564 table_idx = xlat_tables_va_to_index(table_base_va, table_idx_va, level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000565
Antonio Nino Diazac998032017-02-27 17:23:54 +0000566#if PLAT_XLAT_TABLES_DYNAMIC
567 if (level > ctx->base_level)
568 xlat_table_inc_regions_count(ctx, table_base);
569#endif
570
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000571 while (table_idx < table_entries) {
572
573 desc = table_base[table_idx];
574
575 table_idx_pa = mm->base_pa + table_idx_va - mm->base_va;
576
577 action_t action = xlat_tables_map_region_action(mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100578 (uint32_t)(desc & DESC_MASK), table_idx_pa,
579 table_idx_va, level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000580
581 if (action == ACTION_WRITE_BLOCK_ENTRY) {
582
583 table_base[table_idx] =
Antonio Nino Diaze8811472018-04-17 15:10:18 +0100584 xlat_desc(ctx, (uint32_t)mm->attr, table_idx_pa,
585 level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000586
587 } else if (action == ACTION_CREATE_NEW_TABLE) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100588 uintptr_t end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000589
590 subtable = xlat_table_get_empty(ctx);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000591 if (subtable == NULL) {
592 /* Not enough free tables to map this region */
593 return table_idx_va;
594 }
595
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000596 /* Point to new subtable from this one. */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000597 table_base[table_idx] = TABLE_DESC | (unsigned long)subtable;
598
599 /* Recurse to write into subtable */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100600 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000601 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100602 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100603#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
604 xlat_clean_dcache_range((uintptr_t)subtable,
605 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
606#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100607 if (end_va !=
608 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000609 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000610
611 } else if (action == ACTION_RECURSE_INTO_TABLE) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100612 uintptr_t end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000613
614 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
615 /* Recurse to write into subtable */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100616 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000617 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100618 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100619#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
620 xlat_clean_dcache_range((uintptr_t)subtable,
621 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
622#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100623 if (end_va !=
624 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000625 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000626
627 } else {
628
629 assert(action == ACTION_NONE);
630
631 }
632
633 table_idx++;
634 table_idx_va += XLAT_BLOCK_SIZE(level);
635
636 /* If reached the end of the region, exit */
637 if (mm_end_va <= table_idx_va)
638 break;
639 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000640
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100641 return table_idx_va - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000642}
643
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000644/*
645 * Function that verifies that a region can be mapped.
646 * Returns:
647 * 0: Success, the mapping is allowed.
648 * EINVAL: Invalid values were used as arguments.
649 * ERANGE: The memory limits were surpassed.
650 * ENOMEM: There is not enough memory in the mmap array.
651 * EPERM: Region overlaps another one in an invalid way.
652 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100653static int mmap_add_region_check(const xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000654{
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100655 unsigned long long base_pa = mm->base_pa;
656 uintptr_t base_va = mm->base_va;
657 size_t size = mm->size;
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100658 size_t granularity = mm->granularity;
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100659
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100660 unsigned long long end_pa = base_pa + size - 1U;
661 uintptr_t end_va = base_va + size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000662
663 if (!IS_PAGE_ALIGNED(base_pa) || !IS_PAGE_ALIGNED(base_va) ||
664 !IS_PAGE_ALIGNED(size))
665 return -EINVAL;
666
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100667 if ((granularity != XLAT_BLOCK_SIZE(1U)) &&
668 (granularity != XLAT_BLOCK_SIZE(2U)) &&
669 (granularity != XLAT_BLOCK_SIZE(3U))) {
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100670 return -EINVAL;
671 }
672
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000673 /* Check for overflows */
674 if ((base_pa > end_pa) || (base_va > end_va))
675 return -ERANGE;
676
677 if ((base_va + (uintptr_t)size - (uintptr_t)1) > ctx->va_max_address)
678 return -ERANGE;
679
680 if ((base_pa + (unsigned long long)size - 1ULL) > ctx->pa_max_address)
681 return -ERANGE;
682
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100683 /* Check that there is space in the ctx->mmap array */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100684 if (ctx->mmap[ctx->mmap_num - 1].size != 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000685 return -ENOMEM;
686
687 /* Check for PAs and VAs overlaps with all other regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100688 for (const mmap_region_t *mm_cursor = ctx->mmap;
689 mm_cursor->size != 0U; ++mm_cursor) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000690
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100691 uintptr_t mm_cursor_end_va = mm_cursor->base_va
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100692 + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000693
694 /*
695 * Check if one of the regions is completely inside the other
696 * one.
697 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100698 bool fully_overlapped_va =
699 ((base_va >= mm_cursor->base_va) &&
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100700 (end_va <= mm_cursor_end_va)) ||
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100701 ((mm_cursor->base_va >= base_va) &&
702 (mm_cursor_end_va <= end_va));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000703
704 /*
705 * Full VA overlaps are only allowed if both regions are
706 * identity mapped (zero offset) or have the same VA to PA
707 * offset. Also, make sure that it's not the exact same area.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000708 * This can only be done with static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000709 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100710 if (fully_overlapped_va) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000711
Antonio Nino Diazac998032017-02-27 17:23:54 +0000712#if PLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100713 if (((mm->attr & MT_DYNAMIC) != 0U) ||
714 ((mm_cursor->attr & MT_DYNAMIC) != 0U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000715 return -EPERM;
716#endif /* PLAT_XLAT_TABLES_DYNAMIC */
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100717 if ((mm_cursor->base_va - mm_cursor->base_pa) !=
718 (base_va - base_pa))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000719 return -EPERM;
720
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100721 if ((base_va == mm_cursor->base_va) &&
722 (size == mm_cursor->size))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000723 return -EPERM;
724
725 } else {
726 /*
727 * If the regions do not have fully overlapping VAs,
728 * then they must have fully separated VAs and PAs.
729 * Partial overlaps are not allowed
730 */
731
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100732 unsigned long long mm_cursor_end_pa =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100733 mm_cursor->base_pa + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000734
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100735 bool separated_pa = (end_pa < mm_cursor->base_pa) ||
736 (base_pa > mm_cursor_end_pa);
737 bool separated_va = (end_va < mm_cursor->base_va) ||
738 (base_va > mm_cursor_end_va);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000739
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100740 if (!separated_va || !separated_pa)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000741 return -EPERM;
742 }
743 }
744
745 return 0;
746}
747
Sandrine Bailleux66342932017-07-18 13:26:36 +0100748void mmap_add_region_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000749{
John Tsichritzisfdd92482018-05-25 09:12:48 +0100750 mmap_region_t *mm_cursor = ctx->mmap, *mm_destination;
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700751 const mmap_region_t *mm_end = ctx->mmap + ctx->mmap_num;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100752 const mmap_region_t *mm_last;
753 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
754 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000755 int ret;
756
757 /* Ignore empty regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100758 if (mm->size == 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000759 return;
760
Antonio Nino Diazac998032017-02-27 17:23:54 +0000761 /* Static regions must be added before initializing the xlat tables. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100762 assert(!ctx->initialized);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000763
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100764 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000765 if (ret != 0) {
766 ERROR("mmap_add_region_check() failed. error %d\n", ret);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100767 assert(false);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000768 return;
769 }
770
771 /*
772 * Find correct place in mmap to insert new region.
773 *
774 * 1 - Lower region VA end first.
775 * 2 - Smaller region size first.
776 *
777 * VA 0 0xFF
778 *
779 * 1st |------|
780 * 2nd |------------|
781 * 3rd |------|
782 * 4th |---|
783 * 5th |---|
784 * 6th |----------|
785 * 7th |-------------------------------------|
786 *
787 * This is required for overlapping regions only. It simplifies adding
788 * regions with the loop in xlat_tables_init_internal because the outer
789 * ones won't overwrite block or page descriptors of regions added
790 * previously.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000791 *
792 * Overlapping is only allowed for static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000793 */
794
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100795 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
796 && (mm_cursor->size != 0U)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000797 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100798 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000799
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100800 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
801 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000802 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100803 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000804
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700805 /*
806 * Find the last entry marker in the mmap
807 */
808 mm_last = ctx->mmap;
809 while ((mm_last->size != 0U) && (mm_last < mm_end)) {
810 ++mm_last;
811 }
812
813 /*
814 * Check if we have enough space in the memory mapping table.
815 * This shouldn't happen as we have checked in mmap_add_region_check
816 * that there is free space.
817 */
818 assert(mm_last->size == 0U);
Jeenu Viswambharan58e81482018-04-27 15:06:57 +0100819
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000820 /* Make room for new region by moving other regions up by one place */
John Tsichritzisfdd92482018-05-25 09:12:48 +0100821 mm_destination = mm_cursor + 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100822 (void)memmove(mm_destination, mm_cursor,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000823 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
824
825 /*
826 * Check we haven't lost the empty sentinel from the end of the array.
827 * This shouldn't happen as we have checked in mmap_add_region_check
828 * that there is free space.
829 */
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700830 assert(mm_end->size == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000831
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100832 *mm_cursor = *mm;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000833
834 if (end_pa > ctx->max_pa)
835 ctx->max_pa = end_pa;
836 if (end_va > ctx->max_va)
837 ctx->max_va = end_va;
838}
839
Antonio Nino Diazc0033282018-11-20 16:03:11 +0000840/*
841 * Determine the table level closest to the initial lookup level that
842 * can describe this translation. Then, align base VA to the next block
843 * at the determined level.
844 */
845static void mmap_alloc_va_align_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
846{
847 /*
848 * By or'ing the size and base PA the alignment will be the one
849 * corresponding to the smallest boundary of the two of them.
850 *
851 * There are three different cases. For example (for 4 KiB page size):
852 *
853 * +--------------+------------------++--------------+
854 * | PA alignment | Size multiple of || VA alignment |
855 * +--------------+------------------++--------------+
856 * | 2 MiB | 2 MiB || 2 MiB | (1)
857 * | 2 MiB | 4 KiB || 4 KiB | (2)
858 * | 4 KiB | 2 MiB || 4 KiB | (3)
859 * +--------------+------------------++--------------+
860 *
861 * - In (1), it is possible to take advantage of the alignment of the PA
862 * and the size of the region to use a level 2 translation table
863 * instead of a level 3 one.
864 *
865 * - In (2), the size is smaller than a block entry of level 2, so it is
866 * needed to use a level 3 table to describe the region or the library
867 * will map more memory than the desired one.
868 *
869 * - In (3), even though the region has the size of one level 2 block
870 * entry, it isn't possible to describe the translation with a level 2
871 * block entry because of the alignment of the base PA.
872 *
873 * Only bits 47:21 of a level 2 block descriptor are used by the MMU,
874 * bits 20:0 of the resulting address are 0 in this case. Because of
875 * this, the PA generated as result of this translation is aligned to
876 * 2 MiB. The PA that was requested to be mapped is aligned to 4 KiB,
877 * though, which means that the resulting translation is incorrect.
878 * The only way to prevent this is by using a finer granularity.
879 */
880 unsigned long long align_check;
881
882 align_check = mm->base_pa | (unsigned long long)mm->size;
883
884 /*
885 * Assume it is always aligned to level 3. There's no need to check that
886 * level because its block size is PAGE_SIZE. The checks to verify that
887 * the addresses and size are aligned to PAGE_SIZE are inside
888 * mmap_add_region.
889 */
890 for (unsigned int level = ctx->base_level; level <= 2U; ++level) {
891
892 if ((align_check & XLAT_BLOCK_MASK(level)) != 0U)
893 continue;
894
895 mm->base_va = round_up(mm->base_va, XLAT_BLOCK_SIZE(level));
896 return;
897 }
898}
899
900void mmap_add_region_alloc_va_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
901{
902 mm->base_va = ctx->max_va + 1UL;
903
904 assert(mm->size > 0U);
905
906 mmap_alloc_va_align_ctx(ctx, mm);
907
908 /* Detect overflows. More checks are done in mmap_add_region_check(). */
909 assert(mm->base_va > ctx->max_va);
910
911 mmap_add_region_ctx(ctx, mm);
912}
913
Sandrine Bailleux66342932017-07-18 13:26:36 +0100914void mmap_add_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
915{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100916 const mmap_region_t *mm_cursor = mm;
917
Antonio Nino Diaz2cb864c2018-10-08 16:11:11 +0100918 while (mm_cursor->granularity != 0U) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100919 mmap_add_region_ctx(ctx, mm_cursor);
920 mm_cursor++;
Sandrine Bailleux66342932017-07-18 13:26:36 +0100921 }
922}
923
Antonio Nino Diazac998032017-02-27 17:23:54 +0000924#if PLAT_XLAT_TABLES_DYNAMIC
925
926int mmap_add_dynamic_region_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
927{
928 mmap_region_t *mm_cursor = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100929 const mmap_region_t *mm_last = mm_cursor + ctx->mmap_num;
930 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
931 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000932 int ret;
933
934 /* Nothing to do */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100935 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000936 return 0;
937
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100938 /* Now this region is a dynamic one */
939 mm->attr |= MT_DYNAMIC;
940
941 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000942 if (ret != 0)
943 return ret;
944
945 /*
946 * Find the adequate entry in the mmap array in the same way done for
947 * static regions in mmap_add_region_ctx().
948 */
949
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100950 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
951 && (mm_cursor->size != 0U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000952 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100953 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000954
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100955 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
956 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000957 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100958 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000959
960 /* Make room for new region by moving other regions up by one place */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100961 (void)memmove(mm_cursor + 1U, mm_cursor,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100962 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000963
964 /*
965 * Check we haven't lost the empty sentinal from the end of the array.
966 * This shouldn't happen as we have checked in mmap_add_region_check
967 * that there is free space.
968 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100969 assert(mm_last->size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000970
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100971 *mm_cursor = *mm;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000972
973 /*
974 * Update the translation tables if the xlat tables are initialized. If
975 * not, this region will be mapped when they are initialized.
976 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100977 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100978 end_va = xlat_tables_map_region(ctx, mm_cursor,
979 0U, ctx->base_table, ctx->base_table_entries,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100980 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100981#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
982 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
983 ctx->base_table_entries * sizeof(uint64_t));
984#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000985 /* Failed to map, remove mmap entry, unmap and return error. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100986 if (end_va != (mm_cursor->base_va + mm_cursor->size - 1U)) {
987 (void)memmove(mm_cursor, mm_cursor + 1U,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100988 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000989
990 /*
991 * Check if the mapping function actually managed to map
992 * anything. If not, just return now.
993 */
Antonio Nino Diaz3f518922018-01-05 11:30:36 +0000994 if (mm->base_va >= end_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000995 return -ENOMEM;
996
997 /*
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100998 * Something went wrong after mapping some table
999 * entries, undo every change done up to this point.
Antonio Nino Diazac998032017-02-27 17:23:54 +00001000 */
1001 mmap_region_t unmap_mm = {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001002 .base_pa = 0U,
Antonio Nino Diazac998032017-02-27 17:23:54 +00001003 .base_va = mm->base_va,
1004 .size = end_va - mm->base_va,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001005 .attr = 0U
Antonio Nino Diazac998032017-02-27 17:23:54 +00001006 };
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001007 xlat_tables_unmap_region(ctx, &unmap_mm, 0U,
1008 ctx->base_table, ctx->base_table_entries,
1009 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001010#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1011 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1012 ctx->base_table_entries * sizeof(uint64_t));
1013#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +00001014 return -ENOMEM;
1015 }
1016
1017 /*
1018 * Make sure that all entries are written to the memory. There
1019 * is no need to invalidate entries when mapping dynamic regions
1020 * because new table/block/page descriptors only replace old
1021 * invalid descriptors, that aren't TLB cached.
1022 */
1023 dsbishst();
1024 }
1025
1026 if (end_pa > ctx->max_pa)
1027 ctx->max_pa = end_pa;
1028 if (end_va > ctx->max_va)
1029 ctx->max_va = end_va;
1030
1031 return 0;
1032}
1033
Antonio Nino Diazc0033282018-11-20 16:03:11 +00001034int mmap_add_dynamic_region_alloc_va_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
1035{
1036 mm->base_va = ctx->max_va + 1UL;
1037
1038 if (mm->size == 0U)
1039 return 0;
1040
1041 mmap_alloc_va_align_ctx(ctx, mm);
1042
1043 /* Detect overflows. More checks are done in mmap_add_region_check(). */
1044 if (mm->base_va < ctx->max_va) {
1045 return -ENOMEM;
1046 }
1047
1048 return mmap_add_dynamic_region_ctx(ctx, mm);
1049}
1050
Antonio Nino Diazac998032017-02-27 17:23:54 +00001051/*
1052 * Removes the region with given base Virtual Address and size from the given
1053 * context.
1054 *
1055 * Returns:
1056 * 0: Success.
1057 * EINVAL: Invalid values were used as arguments (region not found).
1058 * EPERM: Tried to remove a static region.
1059 */
1060int mmap_remove_dynamic_region_ctx(xlat_ctx_t *ctx, uintptr_t base_va,
1061 size_t size)
1062{
1063 mmap_region_t *mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001064 const mmap_region_t *mm_last = mm + ctx->mmap_num;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001065 int update_max_va_needed = 0;
1066 int update_max_pa_needed = 0;
1067
1068 /* Check sanity of mmap array. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001069 assert(mm[ctx->mmap_num].size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001070
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001071 while (mm->size != 0U) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001072 if ((mm->base_va == base_va) && (mm->size == size))
1073 break;
1074 ++mm;
1075 }
1076
1077 /* Check that the region was found */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001078 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001079 return -EINVAL;
1080
1081 /* If the region is static it can't be removed */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001082 if ((mm->attr & MT_DYNAMIC) == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001083 return -EPERM;
1084
1085 /* Check if this region is using the top VAs or PAs. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001086 if ((mm->base_va + mm->size - 1U) == ctx->max_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001087 update_max_va_needed = 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001088 if ((mm->base_pa + mm->size - 1U) == ctx->max_pa)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001089 update_max_pa_needed = 1;
1090
1091 /* Update the translation tables if needed */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001092 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001093 xlat_tables_unmap_region(ctx, mm, 0U, ctx->base_table,
Antonio Nino Diazac998032017-02-27 17:23:54 +00001094 ctx->base_table_entries,
1095 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001096#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1097 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1098 ctx->base_table_entries * sizeof(uint64_t));
1099#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +00001100 xlat_arch_tlbi_va_sync();
1101 }
1102
1103 /* Remove this region by moving the rest down by one place. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001104 (void)memmove(mm, mm + 1U, (uintptr_t)mm_last - (uintptr_t)mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001105
1106 /* Check if we need to update the max VAs and PAs */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001107 if (update_max_va_needed == 1) {
1108 ctx->max_va = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001109 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001110 while (mm->size != 0U) {
1111 if ((mm->base_va + mm->size - 1U) > ctx->max_va)
1112 ctx->max_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001113 ++mm;
1114 }
1115 }
1116
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001117 if (update_max_pa_needed == 1) {
1118 ctx->max_pa = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001119 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001120 while (mm->size != 0U) {
1121 if ((mm->base_pa + mm->size - 1U) > ctx->max_pa)
1122 ctx->max_pa = mm->base_pa + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001123 ++mm;
1124 }
1125 }
1126
1127 return 0;
1128}
1129
Antonio Nino Diaz675d1552018-10-30 11:36:47 +00001130void xlat_setup_dynamic_ctx(xlat_ctx_t *ctx, unsigned long long pa_max,
1131 uintptr_t va_max, struct mmap_region *mmap,
1132 unsigned int mmap_num, uint64_t **tables,
1133 unsigned int tables_num, uint64_t *base_table,
1134 int xlat_regime, int *mapped_regions)
1135{
1136 ctx->xlat_regime = xlat_regime;
1137
1138 ctx->pa_max_address = pa_max;
1139 ctx->va_max_address = va_max;
1140
1141 ctx->mmap = mmap;
1142 ctx->mmap_num = mmap_num;
1143 memset(ctx->mmap, 0, sizeof(struct mmap_region) * mmap_num);
1144
1145 ctx->tables = (void *) tables;
1146 ctx->tables_num = tables_num;
1147
1148 uintptr_t va_space_size = va_max + 1;
1149 ctx->base_level = GET_XLAT_TABLE_LEVEL_BASE(va_space_size);
1150 ctx->base_table = base_table;
1151 ctx->base_table_entries = GET_NUM_BASE_LEVEL_ENTRIES(va_space_size);
1152
1153 ctx->tables_mapped_regions = mapped_regions;
1154
1155 ctx->max_pa = 0;
1156 ctx->max_va = 0;
1157 ctx->initialized = 0;
1158}
1159
Antonio Nino Diazac998032017-02-27 17:23:54 +00001160#endif /* PLAT_XLAT_TABLES_DYNAMIC */
1161
Daniel Boulby5a03a252018-08-30 16:48:56 +01001162void __init init_xlat_tables_ctx(xlat_ctx_t *ctx)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001163{
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001164 assert(ctx != NULL);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001165 assert(!ctx->initialized);
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001166 assert((ctx->xlat_regime == EL3_REGIME) ||
Antonio Nino Diaz128de8d2018-08-07 19:59:49 +01001167 (ctx->xlat_regime == EL2_REGIME) ||
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001168 (ctx->xlat_regime == EL1_EL0_REGIME));
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001169 assert(!is_mmu_enabled_ctx(ctx));
Sandrine Bailleux66342932017-07-18 13:26:36 +01001170
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001171 mmap_region_t *mm = ctx->mmap;
Sandrine Bailleux66342932017-07-18 13:26:36 +01001172
Sathees Balya74155972019-01-25 11:36:01 +00001173 assert(ctx->va_max_address >=
1174 (xlat_get_min_virt_addr_space_size() - 1U));
1175 assert(ctx->va_max_address <= (MAX_VIRT_ADDR_SPACE_SIZE - 1U));
1176 assert(IS_POWER_OF_TWO(ctx->va_max_address + 1U));
1177
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +01001178 xlat_mmap_print(mm);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001179
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001180 /* All tables must be zeroed before mapping any region. */
1181
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001182 for (unsigned int i = 0U; i < ctx->base_table_entries; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001183 ctx->base_table[i] = INVALID_DESC;
1184
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001185 for (int j = 0; j < ctx->tables_num; j++) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001186#if PLAT_XLAT_TABLES_DYNAMIC
1187 ctx->tables_mapped_regions[j] = 0;
1188#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001189 for (unsigned int i = 0U; i < XLAT_TABLE_ENTRIES; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001190 ctx->tables[j][i] = INVALID_DESC;
1191 }
1192
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001193 while (mm->size != 0U) {
1194 uintptr_t end_va = xlat_tables_map_region(ctx, mm, 0U,
1195 ctx->base_table, ctx->base_table_entries,
1196 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001197#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1198 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1199 ctx->base_table_entries * sizeof(uint64_t));
1200#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001201 if (end_va != (mm->base_va + mm->size - 1U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001202 ERROR("Not enough memory to map region:\n"
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001203 " VA:0x%lx PA:0x%llx size:0x%zx attr:0x%x\n",
1204 mm->base_va, mm->base_pa, mm->size, mm->attr);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001205 panic();
1206 }
1207
1208 mm++;
1209 }
1210
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001211 assert(ctx->pa_max_address <= xlat_arch_get_max_supported_pa());
Sandrine Bailleux66342932017-07-18 13:26:36 +01001212 assert(ctx->max_va <= ctx->va_max_address);
1213 assert(ctx->max_pa <= ctx->pa_max_address);
1214
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001215 ctx->initialized = true;
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001216
1217 xlat_tables_print(ctx);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001218}