blob: 56b9514c36116b9ea5d1d9a4f5958ce2c3e018f0 [file] [log] [blame]
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
Antonio Nino Diaz3f518922018-01-05 11:30:36 +00002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00007#include <arch_helpers.h>
8#include <assert.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00009#include <debug.h>
10#include <errno.h>
11#include <platform_def.h>
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010012#include <stdbool.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000013#include <string.h>
14#include <types.h>
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010015#include <utils_def.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010016#include <xlat_tables_defs.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000017#include <xlat_tables_v2.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010018
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000019#include "xlat_tables_private.h"
20
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +010021/* Helper function that cleans the data cache only if it is enabled. */
22static inline void xlat_clean_dcache_range(uintptr_t addr, size_t size)
23{
24 if (is_dcache_enabled())
25 clean_dcache_range(addr, size);
26}
27
Antonio Nino Diazac998032017-02-27 17:23:54 +000028#if PLAT_XLAT_TABLES_DYNAMIC
29
30/*
31 * The following functions assume that they will be called using subtables only.
32 * The base table can't be unmapped, so it is not needed to do any special
33 * handling for it.
34 */
35
36/*
37 * Returns the index of the array corresponding to the specified translation
38 * table.
39 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010040static int xlat_table_get_index(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000041{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010042 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000043 if (ctx->tables[i] == table)
44 return i;
45
46 /*
47 * Maybe we were asked to get the index of the base level table, which
48 * should never happen.
49 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010050 assert(false);
Antonio Nino Diazac998032017-02-27 17:23:54 +000051
52 return -1;
53}
54
55/* Returns a pointer to an empty translation table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010056static uint64_t *xlat_table_get_empty(const xlat_ctx_t *ctx)
Antonio Nino Diazac998032017-02-27 17:23:54 +000057{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010058 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000059 if (ctx->tables_mapped_regions[i] == 0)
60 return ctx->tables[i];
61
62 return NULL;
63}
64
65/* Increments region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010066static void xlat_table_inc_regions_count(const xlat_ctx_t *ctx,
67 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000068{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010069 int idx = xlat_table_get_index(ctx, table);
70
71 ctx->tables_mapped_regions[idx]++;
Antonio Nino Diazac998032017-02-27 17:23:54 +000072}
73
74/* Decrements region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010075static void xlat_table_dec_regions_count(const xlat_ctx_t *ctx,
76 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000077{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010078 int idx = xlat_table_get_index(ctx, table);
79
80 ctx->tables_mapped_regions[idx]--;
Antonio Nino Diazac998032017-02-27 17:23:54 +000081}
82
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010083/* Returns 0 if the specified table isn't empty, otherwise 1. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010084static bool xlat_table_is_empty(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000085{
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010086 return ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)] == 0;
Antonio Nino Diazac998032017-02-27 17:23:54 +000087}
88
89#else /* PLAT_XLAT_TABLES_DYNAMIC */
90
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000091/* Returns a pointer to the first empty translation table. */
92static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
93{
94 assert(ctx->next_table < ctx->tables_num);
95
96 return ctx->tables[ctx->next_table++];
97}
98
Antonio Nino Diazac998032017-02-27 17:23:54 +000099#endif /* PLAT_XLAT_TABLES_DYNAMIC */
100
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100101/*
102 * Returns a block/page table descriptor for the given level and attributes.
103 */
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100104uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100105 unsigned long long addr_pa, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000106{
107 uint64_t desc;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100108 uint32_t mem_type;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000109
110 /* Make sure that the granularity is fine enough to map this address. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100111 assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000112
113 desc = addr_pa;
114 /*
115 * There are different translation table descriptors for level 3 and the
116 * rest.
117 */
118 desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC;
119 /*
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100120 * Always set the access flag, as this library assumes access flag
121 * faults aren't managed.
122 */
123 desc |= LOWER_ATTRS(ACCESS_FLAG);
124 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000125 * Deduce other fields of the descriptor based on the MT_NS and MT_RW
126 * memory region attributes.
127 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100128 desc |= ((attr & MT_NS) != 0U) ? LOWER_ATTRS(NS) : 0U;
129 desc |= ((attr & MT_RW) != 0U) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000130
131 /*
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100132 * Do not allow unprivileged access when the mapping is for a privileged
133 * EL. For translation regimes that do not have mappings for access for
134 * lower exception levels, set AP[2] to AP_NO_ACCESS_UNPRIVILEGED.
135 */
136 if (ctx->xlat_regime == EL1_EL0_REGIME) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100137 if ((attr & MT_USER) != 0U) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100138 /* EL0 mapping requested, so we give User access */
139 desc |= LOWER_ATTRS(AP_ACCESS_UNPRIVILEGED);
140 } else {
141 /* EL1 mapping requested, no User access granted */
142 desc |= LOWER_ATTRS(AP_NO_ACCESS_UNPRIVILEGED);
143 }
144 } else {
145 assert(ctx->xlat_regime == EL3_REGIME);
Antonio Nino Diaz49074492018-04-26 12:59:08 +0100146 desc |= LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100147 }
148
149 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000150 * Deduce shareability domain and executability of the memory region
151 * from the memory type of the attributes (MT_TYPE).
152 *
153 * Data accesses to device memory and non-cacheable normal memory are
154 * coherent for all observers in the system, and correspondingly are
155 * always treated as being Outer Shareable. Therefore, for these 2 types
156 * of memory, it is not strictly needed to set the shareability field
157 * in the translation tables.
158 */
159 mem_type = MT_TYPE(attr);
160 if (mem_type == MT_DEVICE) {
161 desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH);
162 /*
163 * Always map device memory as execute-never.
164 * This is to avoid the possibility of a speculative instruction
165 * fetch, which could be an issue if this memory region
166 * corresponds to a read-sensitive peripheral.
167 */
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100168 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100169
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000170 } else { /* Normal memory */
171 /*
172 * Always map read-write normal memory as execute-never.
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100173 * This library assumes that it is used by software that does
174 * not self-modify its code, therefore R/W memory is reserved
175 * for data storage, which must not be executable.
176 *
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000177 * Note that setting the XN bit here is for consistency only.
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100178 * The function that enables the MMU sets the SCTLR_ELx.WXN bit,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000179 * which makes any writable memory region to be treated as
180 * execute-never, regardless of the value of the XN bit in the
181 * translation table.
182 *
183 * For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100184 * attribute to figure out the value of the XN bit. The actual
185 * XN bit(s) to set in the descriptor depends on the context's
186 * translation regime and the policy applied in
187 * xlat_arch_regime_get_xn_desc().
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000188 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100189 if (((attr & MT_RW) != 0U) || ((attr & MT_EXECUTE_NEVER) != 0U)) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100190 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100191 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000192
193 if (mem_type == MT_MEMORY) {
194 desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH);
195 } else {
196 assert(mem_type == MT_NON_CACHEABLE);
197 desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH);
198 }
199 }
200
201 return desc;
202}
203
204/*
205 * Enumeration of actions that can be made when mapping table entries depending
206 * on the previous value in that entry and information about the region being
207 * mapped.
208 */
209typedef enum {
210
211 /* Do nothing */
212 ACTION_NONE,
213
214 /* Write a block (or page, if in level 3) entry. */
215 ACTION_WRITE_BLOCK_ENTRY,
216
217 /*
218 * Create a new table and write a table entry pointing to it. Recurse
219 * into it for further processing.
220 */
221 ACTION_CREATE_NEW_TABLE,
222
223 /*
224 * There is a table descriptor in this entry, read it and recurse into
225 * that table for further processing.
226 */
227 ACTION_RECURSE_INTO_TABLE,
228
229} action_t;
230
Antonio Nino Diazac998032017-02-27 17:23:54 +0000231#if PLAT_XLAT_TABLES_DYNAMIC
232
233/*
234 * Recursive function that writes to the translation tables and unmaps the
235 * specified region.
236 */
237static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
238 const uintptr_t table_base_va,
239 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100240 const unsigned int table_entries,
Varun Wadekar66231d12017-06-07 09:57:42 -0700241 const unsigned int level)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000242{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100243 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diazac998032017-02-27 17:23:54 +0000244
245 uint64_t *subtable;
246 uint64_t desc;
247
248 uintptr_t table_idx_va;
249 uintptr_t table_idx_end_va; /* End VA of this entry */
250
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100251 uintptr_t region_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000252
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100253 unsigned int table_idx;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000254
255 if (mm->base_va > table_base_va) {
256 /* Find the first index of the table affected by the region. */
257 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
258
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100259 table_idx = (unsigned int)((table_idx_va - table_base_va) >>
260 XLAT_ADDR_SHIFT(level));
Antonio Nino Diazac998032017-02-27 17:23:54 +0000261
262 assert(table_idx < table_entries);
263 } else {
264 /* Start from the beginning of the table. */
265 table_idx_va = table_base_va;
266 table_idx = 0;
267 }
268
269 while (table_idx < table_entries) {
270
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100271 table_idx_end_va = table_idx_va + XLAT_BLOCK_SIZE(level) - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000272
273 desc = table_base[table_idx];
274 uint64_t desc_type = desc & DESC_MASK;
275
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100276 action_t action;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000277
278 if ((mm->base_va <= table_idx_va) &&
279 (region_end_va >= table_idx_end_va)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000280 /* Region covers all block */
281
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100282 if (level == 3U) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000283 /*
284 * Last level, only page descriptors allowed,
285 * erase it.
286 */
287 assert(desc_type == PAGE_DESC);
288
289 action = ACTION_WRITE_BLOCK_ENTRY;
290 } else {
291 /*
292 * Other levels can have table descriptors. If
293 * so, recurse into it and erase descriptors
294 * inside it as needed. If there is a block
295 * descriptor, just erase it. If an invalid
296 * descriptor is found, this table isn't
297 * actually mapped, which shouldn't happen.
298 */
299 if (desc_type == TABLE_DESC) {
300 action = ACTION_RECURSE_INTO_TABLE;
301 } else {
302 assert(desc_type == BLOCK_DESC);
303 action = ACTION_WRITE_BLOCK_ENTRY;
304 }
305 }
306
307 } else if ((mm->base_va <= table_idx_end_va) ||
308 (region_end_va >= table_idx_va)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000309 /*
310 * Region partially covers block.
311 *
312 * It can't happen in level 3.
313 *
314 * There must be a table descriptor here, if not there
315 * was a problem when mapping the region.
316 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100317 assert(level < 3U);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000318 assert(desc_type == TABLE_DESC);
319
320 action = ACTION_RECURSE_INTO_TABLE;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100321 } else {
322 /* The region doesn't cover the block at all */
323 action = ACTION_NONE;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000324 }
325
326 if (action == ACTION_WRITE_BLOCK_ENTRY) {
327
328 table_base[table_idx] = INVALID_DESC;
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +0100329 xlat_arch_tlbi_va(table_idx_va, ctx->xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000330
331 } else if (action == ACTION_RECURSE_INTO_TABLE) {
332
333 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
334
335 /* Recurse to write into subtable */
336 xlat_tables_unmap_region(ctx, mm, table_idx_va,
337 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100338 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100339#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
340 xlat_clean_dcache_range((uintptr_t)subtable,
341 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
342#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000343 /*
344 * If the subtable is now empty, remove its reference.
345 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100346 if (xlat_table_is_empty(ctx, subtable)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000347 table_base[table_idx] = INVALID_DESC;
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +0100348 xlat_arch_tlbi_va(table_idx_va,
349 ctx->xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000350 }
351
352 } else {
353 assert(action == ACTION_NONE);
354 }
355
356 table_idx++;
357 table_idx_va += XLAT_BLOCK_SIZE(level);
358
359 /* If reached the end of the region, exit */
360 if (region_end_va <= table_idx_va)
361 break;
362 }
363
364 if (level > ctx->base_level)
365 xlat_table_dec_regions_count(ctx, table_base);
366}
367
368#endif /* PLAT_XLAT_TABLES_DYNAMIC */
369
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000370/*
371 * From the given arguments, it decides which action to take when mapping the
372 * specified region.
373 */
374static action_t xlat_tables_map_region_action(const mmap_region_t *mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100375 unsigned int desc_type, unsigned long long dest_pa,
376 uintptr_t table_entry_base_va, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000377{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100378 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000379 uintptr_t table_entry_end_va =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100380 table_entry_base_va + XLAT_BLOCK_SIZE(level) - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000381
382 /*
383 * The descriptor types allowed depend on the current table level.
384 */
385
386 if ((mm->base_va <= table_entry_base_va) &&
387 (mm_end_va >= table_entry_end_va)) {
388
389 /*
390 * Table entry is covered by region
391 * --------------------------------
392 *
393 * This means that this table entry can describe the whole
394 * translation with this granularity in principle.
395 */
396
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100397 if (level == 3U) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000398 /*
399 * Last level, only page descriptors are allowed.
400 */
401 if (desc_type == PAGE_DESC) {
402 /*
403 * There's another region mapped here, don't
404 * overwrite.
405 */
406 return ACTION_NONE;
407 } else {
408 assert(desc_type == INVALID_DESC);
409 return ACTION_WRITE_BLOCK_ENTRY;
410 }
411
412 } else {
413
414 /*
415 * Other levels. Table descriptors are allowed. Block
416 * descriptors too, but they have some limitations.
417 */
418
419 if (desc_type == TABLE_DESC) {
420 /* There's already a table, recurse into it. */
421 return ACTION_RECURSE_INTO_TABLE;
422
423 } else if (desc_type == INVALID_DESC) {
424 /*
425 * There's nothing mapped here, create a new
426 * entry.
427 *
428 * Check if the destination granularity allows
429 * us to use a block descriptor or we need a
430 * finer table for it.
431 *
432 * Also, check if the current level allows block
433 * descriptors. If not, create a table instead.
434 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100435 if (((dest_pa & XLAT_BLOCK_MASK(level)) != 0U)
436 || (level < MIN_LVL_BLOCK_DESC) ||
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100437 (mm->granularity < XLAT_BLOCK_SIZE(level)))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000438 return ACTION_CREATE_NEW_TABLE;
439 else
440 return ACTION_WRITE_BLOCK_ENTRY;
441
442 } else {
443 /*
444 * There's another region mapped here, don't
445 * overwrite.
446 */
447 assert(desc_type == BLOCK_DESC);
448
449 return ACTION_NONE;
450 }
451 }
452
453 } else if ((mm->base_va <= table_entry_end_va) ||
454 (mm_end_va >= table_entry_base_va)) {
455
456 /*
457 * Region partially covers table entry
458 * -----------------------------------
459 *
460 * This means that this table entry can't describe the whole
461 * translation, a finer table is needed.
462
463 * There cannot be partial block overlaps in level 3. If that
464 * happens, some of the preliminary checks when adding the
465 * mmap region failed to detect that PA and VA must at least be
466 * aligned to PAGE_SIZE.
467 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100468 assert(level < 3U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000469
470 if (desc_type == INVALID_DESC) {
471 /*
472 * The block is not fully covered by the region. Create
473 * a new table, recurse into it and try to map the
474 * region with finer granularity.
475 */
476 return ACTION_CREATE_NEW_TABLE;
477
478 } else {
479 assert(desc_type == TABLE_DESC);
480 /*
481 * The block is not fully covered by the region, but
482 * there is already a table here. Recurse into it and
483 * try to map with finer granularity.
484 *
485 * PAGE_DESC for level 3 has the same value as
486 * TABLE_DESC, but this code can't run on a level 3
487 * table because there can't be overlaps in level 3.
488 */
489 return ACTION_RECURSE_INTO_TABLE;
490 }
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100491 } else {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000492
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100493 /*
494 * This table entry is outside of the region specified in the
495 * arguments, don't write anything to it.
496 */
497 return ACTION_NONE;
498 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000499}
500
501/*
502 * Recursive function that writes to the translation tables and maps the
Antonio Nino Diazac998032017-02-27 17:23:54 +0000503 * specified region. On success, it returns the VA of the last byte that was
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100504 * successfully mapped. On error, it returns the VA of the next entry that
Antonio Nino Diazac998032017-02-27 17:23:54 +0000505 * should have been mapped.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000506 */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000507static uintptr_t xlat_tables_map_region(xlat_ctx_t *ctx, mmap_region_t *mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100508 uintptr_t table_base_va,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000509 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100510 unsigned int table_entries,
511 unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000512{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100513 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000514
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100515 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000516
517 uintptr_t table_idx_va;
518 unsigned long long table_idx_pa;
519
520 uint64_t *subtable;
521 uint64_t desc;
522
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100523 unsigned int table_idx;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000524
525 if (mm->base_va > table_base_va) {
526 /* Find the first index of the table affected by the region. */
527 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
528
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100529 table_idx = (unsigned int)((table_idx_va - table_base_va) >>
530 XLAT_ADDR_SHIFT(level));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000531
532 assert(table_idx < table_entries);
533 } else {
534 /* Start from the beginning of the table. */
535 table_idx_va = table_base_va;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100536 table_idx = 0U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000537 }
538
Antonio Nino Diazac998032017-02-27 17:23:54 +0000539#if PLAT_XLAT_TABLES_DYNAMIC
540 if (level > ctx->base_level)
541 xlat_table_inc_regions_count(ctx, table_base);
542#endif
543
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000544 while (table_idx < table_entries) {
545
546 desc = table_base[table_idx];
547
548 table_idx_pa = mm->base_pa + table_idx_va - mm->base_va;
549
550 action_t action = xlat_tables_map_region_action(mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100551 (uint32_t)(desc & DESC_MASK), table_idx_pa,
552 table_idx_va, level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000553
554 if (action == ACTION_WRITE_BLOCK_ENTRY) {
555
556 table_base[table_idx] =
Antonio Nino Diaze8811472018-04-17 15:10:18 +0100557 xlat_desc(ctx, (uint32_t)mm->attr, table_idx_pa,
558 level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000559
560 } else if (action == ACTION_CREATE_NEW_TABLE) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100561 uintptr_t end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000562
563 subtable = xlat_table_get_empty(ctx);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000564 if (subtable == NULL) {
565 /* Not enough free tables to map this region */
566 return table_idx_va;
567 }
568
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000569 /* Point to new subtable from this one. */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000570 table_base[table_idx] = TABLE_DESC | (unsigned long)subtable;
571
572 /* Recurse to write into subtable */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100573 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000574 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100575 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100576#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
577 xlat_clean_dcache_range((uintptr_t)subtable,
578 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
579#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100580 if (end_va !=
581 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000582 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000583
584 } else if (action == ACTION_RECURSE_INTO_TABLE) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100585 uintptr_t end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000586
587 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
588 /* Recurse to write into subtable */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100589 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000590 subtable, XLAT_TABLE_ENTRIES,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100591 level + 1U);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100592#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
593 xlat_clean_dcache_range((uintptr_t)subtable,
594 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
595#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100596 if (end_va !=
597 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000598 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000599
600 } else {
601
602 assert(action == ACTION_NONE);
603
604 }
605
606 table_idx++;
607 table_idx_va += XLAT_BLOCK_SIZE(level);
608
609 /* If reached the end of the region, exit */
610 if (mm_end_va <= table_idx_va)
611 break;
612 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000613
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100614 return table_idx_va - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000615}
616
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000617/*
618 * Function that verifies that a region can be mapped.
619 * Returns:
620 * 0: Success, the mapping is allowed.
621 * EINVAL: Invalid values were used as arguments.
622 * ERANGE: The memory limits were surpassed.
623 * ENOMEM: There is not enough memory in the mmap array.
624 * EPERM: Region overlaps another one in an invalid way.
625 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100626static int mmap_add_region_check(const xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000627{
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100628 unsigned long long base_pa = mm->base_pa;
629 uintptr_t base_va = mm->base_va;
630 size_t size = mm->size;
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100631 size_t granularity = mm->granularity;
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100632
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100633 unsigned long long end_pa = base_pa + size - 1U;
634 uintptr_t end_va = base_va + size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000635
636 if (!IS_PAGE_ALIGNED(base_pa) || !IS_PAGE_ALIGNED(base_va) ||
637 !IS_PAGE_ALIGNED(size))
638 return -EINVAL;
639
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100640 if ((granularity != XLAT_BLOCK_SIZE(1U)) &&
641 (granularity != XLAT_BLOCK_SIZE(2U)) &&
642 (granularity != XLAT_BLOCK_SIZE(3U))) {
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100643 return -EINVAL;
644 }
645
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000646 /* Check for overflows */
647 if ((base_pa > end_pa) || (base_va > end_va))
648 return -ERANGE;
649
650 if ((base_va + (uintptr_t)size - (uintptr_t)1) > ctx->va_max_address)
651 return -ERANGE;
652
653 if ((base_pa + (unsigned long long)size - 1ULL) > ctx->pa_max_address)
654 return -ERANGE;
655
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100656 /* Check that there is space in the ctx->mmap array */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100657 if (ctx->mmap[ctx->mmap_num - 1].size != 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000658 return -ENOMEM;
659
660 /* Check for PAs and VAs overlaps with all other regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100661 for (const mmap_region_t *mm_cursor = ctx->mmap;
662 mm_cursor->size != 0U; ++mm_cursor) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000663
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100664 uintptr_t mm_cursor_end_va = mm_cursor->base_va
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100665 + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000666
667 /*
668 * Check if one of the regions is completely inside the other
669 * one.
670 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100671 bool fully_overlapped_va =
672 ((base_va >= mm_cursor->base_va) &&
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100673 (end_va <= mm_cursor_end_va)) ||
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100674 ((mm_cursor->base_va >= base_va) &&
675 (mm_cursor_end_va <= end_va));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000676
677 /*
678 * Full VA overlaps are only allowed if both regions are
679 * identity mapped (zero offset) or have the same VA to PA
680 * offset. Also, make sure that it's not the exact same area.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000681 * This can only be done with static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000682 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100683 if (fully_overlapped_va) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000684
Antonio Nino Diazac998032017-02-27 17:23:54 +0000685#if PLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100686 if (((mm->attr & MT_DYNAMIC) != 0U) ||
687 ((mm_cursor->attr & MT_DYNAMIC) != 0U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000688 return -EPERM;
689#endif /* PLAT_XLAT_TABLES_DYNAMIC */
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100690 if ((mm_cursor->base_va - mm_cursor->base_pa) !=
691 (base_va - base_pa))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000692 return -EPERM;
693
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100694 if ((base_va == mm_cursor->base_va) &&
695 (size == mm_cursor->size))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000696 return -EPERM;
697
698 } else {
699 /*
700 * If the regions do not have fully overlapping VAs,
701 * then they must have fully separated VAs and PAs.
702 * Partial overlaps are not allowed
703 */
704
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100705 unsigned long long mm_cursor_end_pa =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100706 mm_cursor->base_pa + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000707
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100708 bool separated_pa = (end_pa < mm_cursor->base_pa) ||
709 (base_pa > mm_cursor_end_pa);
710 bool separated_va = (end_va < mm_cursor->base_va) ||
711 (base_va > mm_cursor_end_va);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000712
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100713 if (!separated_va || !separated_pa)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000714 return -EPERM;
715 }
716 }
717
718 return 0;
719}
720
Sandrine Bailleux66342932017-07-18 13:26:36 +0100721void mmap_add_region_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000722{
John Tsichritzisfdd92482018-05-25 09:12:48 +0100723 mmap_region_t *mm_cursor = ctx->mmap, *mm_destination;
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700724 const mmap_region_t *mm_end = ctx->mmap + ctx->mmap_num;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100725 const mmap_region_t *mm_last;
726 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
727 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000728 int ret;
729
730 /* Ignore empty regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100731 if (mm->size == 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000732 return;
733
Antonio Nino Diazac998032017-02-27 17:23:54 +0000734 /* Static regions must be added before initializing the xlat tables. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100735 assert(!ctx->initialized);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000736
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100737 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000738 if (ret != 0) {
739 ERROR("mmap_add_region_check() failed. error %d\n", ret);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100740 assert(false);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000741 return;
742 }
743
744 /*
745 * Find correct place in mmap to insert new region.
746 *
747 * 1 - Lower region VA end first.
748 * 2 - Smaller region size first.
749 *
750 * VA 0 0xFF
751 *
752 * 1st |------|
753 * 2nd |------------|
754 * 3rd |------|
755 * 4th |---|
756 * 5th |---|
757 * 6th |----------|
758 * 7th |-------------------------------------|
759 *
760 * This is required for overlapping regions only. It simplifies adding
761 * regions with the loop in xlat_tables_init_internal because the outer
762 * ones won't overwrite block or page descriptors of regions added
763 * previously.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000764 *
765 * Overlapping is only allowed for static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000766 */
767
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100768 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
769 && (mm_cursor->size != 0U)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000770 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100771 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000772
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100773 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
774 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000775 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100776 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000777
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700778 /*
779 * Find the last entry marker in the mmap
780 */
781 mm_last = ctx->mmap;
782 while ((mm_last->size != 0U) && (mm_last < mm_end)) {
783 ++mm_last;
784 }
785
786 /*
787 * Check if we have enough space in the memory mapping table.
788 * This shouldn't happen as we have checked in mmap_add_region_check
789 * that there is free space.
790 */
791 assert(mm_last->size == 0U);
Jeenu Viswambharan58e81482018-04-27 15:06:57 +0100792
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000793 /* Make room for new region by moving other regions up by one place */
John Tsichritzisfdd92482018-05-25 09:12:48 +0100794 mm_destination = mm_cursor + 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100795 (void)memmove(mm_destination, mm_cursor,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000796 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
797
798 /*
799 * Check we haven't lost the empty sentinel from the end of the array.
800 * This shouldn't happen as we have checked in mmap_add_region_check
801 * that there is free space.
802 */
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700803 assert(mm_end->size == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000804
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100805 *mm_cursor = *mm;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000806
807 if (end_pa > ctx->max_pa)
808 ctx->max_pa = end_pa;
809 if (end_va > ctx->max_va)
810 ctx->max_va = end_va;
811}
812
Sandrine Bailleux66342932017-07-18 13:26:36 +0100813void mmap_add_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
814{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100815 const mmap_region_t *mm_cursor = mm;
816
817 while (mm_cursor->size != 0U) {
818 mmap_add_region_ctx(ctx, mm_cursor);
819 mm_cursor++;
Sandrine Bailleux66342932017-07-18 13:26:36 +0100820 }
821}
822
Antonio Nino Diazac998032017-02-27 17:23:54 +0000823#if PLAT_XLAT_TABLES_DYNAMIC
824
825int mmap_add_dynamic_region_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
826{
827 mmap_region_t *mm_cursor = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100828 const mmap_region_t *mm_last = mm_cursor + ctx->mmap_num;
829 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
830 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000831 int ret;
832
833 /* Nothing to do */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100834 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000835 return 0;
836
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100837 /* Now this region is a dynamic one */
838 mm->attr |= MT_DYNAMIC;
839
840 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000841 if (ret != 0)
842 return ret;
843
844 /*
845 * Find the adequate entry in the mmap array in the same way done for
846 * static regions in mmap_add_region_ctx().
847 */
848
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100849 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
850 && (mm_cursor->size != 0U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000851 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100852 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000853
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100854 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
855 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000856 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100857 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000858
859 /* Make room for new region by moving other regions up by one place */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100860 (void)memmove(mm_cursor + 1U, mm_cursor,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100861 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000862
863 /*
864 * Check we haven't lost the empty sentinal from the end of the array.
865 * This shouldn't happen as we have checked in mmap_add_region_check
866 * that there is free space.
867 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100868 assert(mm_last->size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000869
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100870 *mm_cursor = *mm;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000871
872 /*
873 * Update the translation tables if the xlat tables are initialized. If
874 * not, this region will be mapped when they are initialized.
875 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100876 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100877 end_va = xlat_tables_map_region(ctx, mm_cursor,
878 0U, ctx->base_table, ctx->base_table_entries,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100879 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100880#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
881 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
882 ctx->base_table_entries * sizeof(uint64_t));
883#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000884 /* Failed to map, remove mmap entry, unmap and return error. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100885 if (end_va != (mm_cursor->base_va + mm_cursor->size - 1U)) {
886 (void)memmove(mm_cursor, mm_cursor + 1U,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100887 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000888
889 /*
890 * Check if the mapping function actually managed to map
891 * anything. If not, just return now.
892 */
Antonio Nino Diaz3f518922018-01-05 11:30:36 +0000893 if (mm->base_va >= end_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000894 return -ENOMEM;
895
896 /*
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100897 * Something went wrong after mapping some table
898 * entries, undo every change done up to this point.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000899 */
900 mmap_region_t unmap_mm = {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100901 .base_pa = 0U,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000902 .base_va = mm->base_va,
903 .size = end_va - mm->base_va,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100904 .attr = 0U
Antonio Nino Diazac998032017-02-27 17:23:54 +0000905 };
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100906 xlat_tables_unmap_region(ctx, &unmap_mm, 0U,
907 ctx->base_table, ctx->base_table_entries,
908 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100909#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
910 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
911 ctx->base_table_entries * sizeof(uint64_t));
912#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000913 return -ENOMEM;
914 }
915
916 /*
917 * Make sure that all entries are written to the memory. There
918 * is no need to invalidate entries when mapping dynamic regions
919 * because new table/block/page descriptors only replace old
920 * invalid descriptors, that aren't TLB cached.
921 */
922 dsbishst();
923 }
924
925 if (end_pa > ctx->max_pa)
926 ctx->max_pa = end_pa;
927 if (end_va > ctx->max_va)
928 ctx->max_va = end_va;
929
930 return 0;
931}
932
933/*
934 * Removes the region with given base Virtual Address and size from the given
935 * context.
936 *
937 * Returns:
938 * 0: Success.
939 * EINVAL: Invalid values were used as arguments (region not found).
940 * EPERM: Tried to remove a static region.
941 */
942int mmap_remove_dynamic_region_ctx(xlat_ctx_t *ctx, uintptr_t base_va,
943 size_t size)
944{
945 mmap_region_t *mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100946 const mmap_region_t *mm_last = mm + ctx->mmap_num;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000947 int update_max_va_needed = 0;
948 int update_max_pa_needed = 0;
949
950 /* Check sanity of mmap array. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100951 assert(mm[ctx->mmap_num].size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000952
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100953 while (mm->size != 0U) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000954 if ((mm->base_va == base_va) && (mm->size == size))
955 break;
956 ++mm;
957 }
958
959 /* Check that the region was found */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100960 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000961 return -EINVAL;
962
963 /* If the region is static it can't be removed */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100964 if ((mm->attr & MT_DYNAMIC) == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000965 return -EPERM;
966
967 /* Check if this region is using the top VAs or PAs. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100968 if ((mm->base_va + mm->size - 1U) == ctx->max_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000969 update_max_va_needed = 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100970 if ((mm->base_pa + mm->size - 1U) == ctx->max_pa)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000971 update_max_pa_needed = 1;
972
973 /* Update the translation tables if needed */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100974 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100975 xlat_tables_unmap_region(ctx, mm, 0U, ctx->base_table,
Antonio Nino Diazac998032017-02-27 17:23:54 +0000976 ctx->base_table_entries,
977 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100978#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
979 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
980 ctx->base_table_entries * sizeof(uint64_t));
981#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000982 xlat_arch_tlbi_va_sync();
983 }
984
985 /* Remove this region by moving the rest down by one place. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100986 (void)memmove(mm, mm + 1U, (uintptr_t)mm_last - (uintptr_t)mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000987
988 /* Check if we need to update the max VAs and PAs */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100989 if (update_max_va_needed == 1) {
990 ctx->max_va = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000991 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100992 while (mm->size != 0U) {
993 if ((mm->base_va + mm->size - 1U) > ctx->max_va)
994 ctx->max_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000995 ++mm;
996 }
997 }
998
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100999 if (update_max_pa_needed == 1) {
1000 ctx->max_pa = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001001 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001002 while (mm->size != 0U) {
1003 if ((mm->base_pa + mm->size - 1U) > ctx->max_pa)
1004 ctx->max_pa = mm->base_pa + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001005 ++mm;
1006 }
1007 }
1008
1009 return 0;
1010}
1011
1012#endif /* PLAT_XLAT_TABLES_DYNAMIC */
1013
Sandrine Bailleux66342932017-07-18 13:26:36 +01001014void init_xlat_tables_ctx(xlat_ctx_t *ctx)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001015{
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001016 assert(ctx != NULL);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001017 assert(!ctx->initialized);
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001018 assert((ctx->xlat_regime == EL3_REGIME) ||
1019 (ctx->xlat_regime == EL1_EL0_REGIME));
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001020 assert(!is_mmu_enabled_ctx(ctx));
Sandrine Bailleux66342932017-07-18 13:26:36 +01001021
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001022 mmap_region_t *mm = ctx->mmap;
Sandrine Bailleux66342932017-07-18 13:26:36 +01001023
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +01001024 xlat_mmap_print(mm);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001025
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001026 /* All tables must be zeroed before mapping any region. */
1027
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001028 for (unsigned int i = 0U; i < ctx->base_table_entries; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001029 ctx->base_table[i] = INVALID_DESC;
1030
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001031 for (int j = 0; j < ctx->tables_num; j++) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001032#if PLAT_XLAT_TABLES_DYNAMIC
1033 ctx->tables_mapped_regions[j] = 0;
1034#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001035 for (unsigned int i = 0U; i < XLAT_TABLE_ENTRIES; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001036 ctx->tables[j][i] = INVALID_DESC;
1037 }
1038
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001039 while (mm->size != 0U) {
1040 uintptr_t end_va = xlat_tables_map_region(ctx, mm, 0U,
1041 ctx->base_table, ctx->base_table_entries,
1042 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001043#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1044 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1045 ctx->base_table_entries * sizeof(uint64_t));
1046#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001047 if (end_va != (mm->base_va + mm->size - 1U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001048 ERROR("Not enough memory to map region:\n"
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001049 " VA:0x%lx PA:0x%llx size:0x%zx attr:0x%x\n",
1050 mm->base_va, mm->base_pa, mm->size, mm->attr);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001051 panic();
1052 }
1053
1054 mm++;
1055 }
1056
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001057 assert(ctx->pa_max_address <= xlat_arch_get_max_supported_pa());
Sandrine Bailleux66342932017-07-18 13:26:36 +01001058 assert(ctx->max_va <= ctx->va_max_address);
1059 assert(ctx->max_pa <= ctx->pa_max_address);
1060
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001061 ctx->initialized = true;
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001062
1063 xlat_tables_print(ctx);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001064}