| Yann Gautier | a250e12 | 2023-06-14 09:18:19 +0200 | [diff] [blame] | 1 | STM32 MPUs |
| 2 | ========== |
| 3 | |
| 4 | STM32 MPUs are microprocessors designed by STMicroelectronics |
| 5 | based on Arm Cortex-A. This page presents the common configuration of STM32 |
| 6 | MPUs, more details and dedicated configuration can be found in each STM32 MPU |
| Yann Gautier | e6ecc3c | 2023-03-17 14:02:12 +0100 | [diff] [blame] | 7 | page (:ref:`STM32MP1` or :ref:`STM32MP2`) |
| Yann Gautier | a250e12 | 2023-06-14 09:18:19 +0200 | [diff] [blame] | 8 | |
| 9 | Design |
| 10 | ------ |
| 11 | The STM32 MPU resets in the ROM code of the Cortex-A. |
| 12 | The primary boot core (core 0) executes the boot sequence while |
| 13 | secondary boot core (core 1) is kept in a holding pen loop. |
| 14 | The ROM code boot sequence loads the TF-A binary image from boot device |
| 15 | to embedded SRAM. |
| 16 | |
| 17 | The TF-A image must be properly formatted with a STM32 header structure |
| 18 | for ROM code is able to load this image. |
| 19 | Tool stm32image can be used to prepend this header to the generated TF-A binary. |
| 20 | |
| 21 | Boot |
| 22 | ~~~~ |
| 23 | Only BL2 (with STM32 header) is loaded by ROM code. The other binaries are |
| 24 | inside the FIP binary: BL31 (for Aarch64 platforms), BL32 (OP-TEE), U-Boot |
| 25 | and their respective device tree blobs. |
| 26 | |
| 27 | Boot sequence |
| 28 | ~~~~~~~~~~~~~ |
| 29 | |
| 30 | ROM code -> BL2 (compiled with RESET_TO_BL2) -> OP-TEE -> BL33 (U-Boot) |
| 31 | |
| 32 | Build Instructions |
| 33 | ------------------ |
| 34 | Boot media(s) supported by BL2 must be specified in the build command. |
| 35 | Available storage medias are: |
| 36 | |
| 37 | - ``STM32MP_SDMMC`` |
| 38 | - ``STM32MP_EMMC`` |
| 39 | - ``STM32MP_RAW_NAND`` |
| 40 | - ``STM32MP_SPI_NAND`` |
| 41 | - ``STM32MP_SPI_NOR`` |
| 42 | |
| 43 | Serial boot devices: |
| 44 | |
| 45 | - ``STM32MP_UART_PROGRAMMER`` |
| 46 | - ``STM32MP_USB_PROGRAMMER`` |
| 47 | |
| 48 | |
| 49 | Other configuration flags: |
| 50 | |
| 51 | - | ``DTB_FILE_NAME``: to precise board device-tree blob to be used. |
| 52 | | Default: stm32mp157c-ev1.dtb |
| 53 | - | ``DWL_BUFFER_BASE``: the 'serial boot' load address of FIP, |
| 54 | | default location (end of the first 128MB) is used when absent |
| 55 | - | ``STM32MP_EARLY_CONSOLE``: to enable early traces before clock driver is setup. |
| 56 | | Default: 0 (disabled) |
| 57 | - | ``STM32MP_RECONFIGURE_CONSOLE``: to re-configure crash console (especially after BL2). |
| 58 | | Default: 0 (disabled) |
| 59 | - | ``STM32MP_UART_BAUDRATE``: to select UART baud rate. |
| 60 | | Default: 115200 |
| 61 | |
| 62 | |
| 63 | Populate SD-card |
| 64 | ---------------- |
| 65 | |
| 66 | Boot with FIP |
| 67 | ~~~~~~~~~~~~~ |
| 68 | The SD-card has to be formatted with GPT. |
| 69 | It should contain at least those partitions: |
| 70 | |
| 71 | - fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary (BL2) |
| 72 | - fip (GUID 19d5df83-11b0-457b-be2c-7559c13142a5): which contains the FIP binary |
| 73 | |
| 74 | Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. |
| 75 | |
| 76 | -------------- |
| 77 | |
| 78 | *Copyright (c) 2023, STMicroelectronics - All Rights Reserved* |