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Antonio Nino Diazc326c342019-01-11 11:20:10 +00001/*
Daniel Boulby60786e72021-10-22 11:37:34 +01002 * Copyright (c) 2019-2022, Arm Limited. All rights reserved.
Antonio Nino Diazc326c342019-01-11 11:20:10 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef ARCH_FEATURES_H
8#define ARCH_FEATURES_H
9
10#include <stdbool.h>
11
12#include <arch_helpers.h>
13
Antonio Nino Diazd29d21e2019-02-06 09:23:04 +000014static inline bool is_armv7_gentimer_present(void)
15{
16 /* The Generic Timer is always present in an ARMv8-A implementation */
17 return true;
18}
19
Daniel Boulby44b43332020-11-25 16:36:46 +000020static inline bool is_armv8_1_pan_present(void)
21{
22 return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) &
23 ID_AA64MMFR1_EL1_PAN_MASK) != 0U;
24}
25
26static inline bool is_armv8_1_vhe_present(void)
27{
28 return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_VHE_SHIFT) &
29 ID_AA64MMFR1_EL1_VHE_MASK) != 0U;
30}
31
Antonio Nino Diazc326c342019-01-11 11:20:10 +000032static inline bool is_armv8_2_ttcnp_present(void)
33{
34 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
35 ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
36}
37
Juan Pablo Condee089a172022-06-29 17:44:43 -040038static inline bool is_feat_pacqarma3_present(void)
39{
40 uint64_t mask_id_aa64isar2 =
41 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
42 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
43
44 /* If any of the fields is not zero, QARMA3 algorithm is present */
45 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
46}
47
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000048static inline bool is_armv8_3_pauth_present(void)
49{
Juan Pablo Condee089a172022-06-29 17:44:43 -040050 uint64_t mask_id_aa64isar1 =
51 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
52 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
53 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
54 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000055
Juan Pablo Condee089a172022-06-29 17:44:43 -040056 /*
57 * If any of the fields is not zero or QARMA3 is present,
58 * PAuth is present
59 */
60 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
61 is_feat_pacqarma3_present());
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000062}
63
Daniel Boulby60786e72021-10-22 11:37:34 +010064static inline bool is_armv8_4_dit_present(void)
65{
66 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
67 ID_AA64PFR0_DIT_MASK) == 1U;
68}
69
Sathees Balya74155972019-01-25 11:36:01 +000070static inline bool is_armv8_4_ttst_present(void)
71{
72 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
73 ID_AA64MMFR2_EL1_ST_MASK) == 1U;
74}
75
Alexei Fedorov90f2e882019-05-24 12:17:09 +010076static inline bool is_armv8_5_bti_present(void)
77{
78 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
79 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
80}
81
Soby Mathew830f0ad2019-07-12 09:23:38 +010082static inline unsigned int get_armv8_5_mte_support(void)
83{
84 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
85 ID_AA64PFR1_EL1_MTE_MASK);
86}
87
Olivier Deprez2bae35f2020-04-16 13:39:06 +020088static inline bool is_armv8_4_sel2_present(void)
89{
90 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
91 ID_AA64PFR0_SEL2_MASK) == 1ULL;
92}
93
johpow013e24c162020-04-22 14:05:13 -050094static inline bool is_armv8_6_twed_present(void)
95{
96 return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
97 ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
98}
99
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500100static inline bool is_armv8_6_fgt_present(void)
101{
102 return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_FGT_SHIFT) &
Andre Przywara9f574f62022-10-07 12:19:05 +0100103 ID_AA64MMFR0_EL1_FGT_MASK) != 0U;
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500104}
105
Jimmy Brisson83573892020-04-16 10:48:02 -0500106static inline unsigned long int get_armv8_6_ecv_support(void)
107{
108 return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
109 ID_AA64MMFR0_EL1_ECV_MASK);
110}
111
Tomas Pilar6fd816e2020-10-28 15:34:12 +0000112static inline bool is_armv8_5_rng_present(void)
113{
114 return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) &
115 ID_AA64ISAR0_RNDR_MASK);
116}
117
johpow01fa59c6f2020-10-02 13:41:11 -0500118static inline bool is_armv8_6_feat_amuv1p1_present(void)
119{
120 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT) &
121 ID_AA64PFR0_AMU_MASK) >= ID_AA64PFR0_AMU_V1P1);
122}
123
Alexei Fedorov19933552020-05-26 13:16:41 +0100124/*
125 * Return MPAM version:
126 *
127 * 0x00: None Armv8.0 or later
128 * 0x01: v0.1 Armv8.4 or later
129 * 0x10: v1.0 Armv8.2 or later
130 * 0x11: v1.1 Armv8.4 or later
131 *
132 */
133static inline unsigned int get_mpam_version(void)
134{
135 return (unsigned int)((((read_id_aa64pfr0_el1() >>
136 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
137 ((read_id_aa64pfr1_el1() >>
138 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
139}
140
johpow01f91e59f2021-08-04 19:38:18 -0500141static inline bool is_feat_hcx_present(void)
142{
143 return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_HCX_SHIFT) &
144 ID_AA64MMFR1_EL1_HCX_MASK) == ID_AA64MMFR1_EL1_HCX_SUPPORTED);
145}
146
Juan Pablo Conde42305f22022-07-12 16:40:29 -0400147static inline bool is_feat_rng_trap_present(void)
148{
149 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
150 ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
151 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
152}
153
Zelalem Aweke79e3d292021-07-08 16:51:14 -0500154static inline unsigned int get_armv9_2_feat_rme_support(void)
155{
156 /*
157 * Return the RME version, zero if not supported. This function can be
158 * used as both an integer value for the RME version or compared to zero
159 * to detect RME presence.
160 */
161 return (unsigned int)(read_id_aa64pfr0_el1() >>
162 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
163}
164
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000165/*********************************************************************************
166 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
167 ********************************************************************************/
168static inline bool is_armv8_0_feat_sb_present(void)
169{
170 return (((read_id_aa64isar1_el1() >> ID_AA64ISAR1_SB_SHIFT) &
171 ID_AA64ISAR1_SB_MASK) == ID_AA64ISAR1_SB_SUPPORTED);
172}
173
174/*********************************************************************************
175 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
176 ********************************************************************************/
177static inline bool is_armv8_0_feat_csv2_2_present(void)
178{
179 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) &
180 ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED);
181}
182
183/**********************************************************************************
184 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
185 *********************************************************************************/
186static inline bool is_armv8_2_feat_spe_present(void)
187{
188 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) &
189 ID_AA64DFR0_PMS_MASK) != ID_AA64DFR0_SPE_NOT_SUPPORTED);
190}
191
192/*******************************************************************************
193 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
194 ******************************************************************************/
195static inline bool is_armv8_2_feat_sve_present(void)
196{
197 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) &
198 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED);
199}
200
201/*******************************************************************************
202 * Function to identify the presence of FEAT_RAS (Reliability,Availability,
203 * and Serviceability Extension)
204 ******************************************************************************/
205static inline bool is_armv8_2_feat_ras_present(void)
206{
207 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
208 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
209}
210
211/**************************************************************************
212 * Function to identify the presence of FEAT_DIT (Data Independent Timing)
213 *************************************************************************/
214static inline bool is_armv8_4_feat_dit_present(void)
215{
216 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
217 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
218}
219
220/*************************************************************************
221 * Function to identify the presence of FEAT_TRF (TraceLift)
222 ************************************************************************/
223static inline bool is_arm8_4_feat_trf_present(void)
224{
225 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEFILT_SHIFT) &
226 ID_AA64DFR0_TRACEFILT_MASK) == ID_AA64DFR0_TRACEFILT_SUPPORTED);
227}
228
229/*******************************************************************************
230 * Function to identify the presence of FEAT_AMUv1 (Activity Monitors-
231 * Extension v1)
232 ******************************************************************************/
233static inline bool is_armv8_4_feat_amuv1_present(void)
234{
235 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT) &
236 ID_AA64PFR0_AMU_MASK) >= ID_AA64PFR0_AMU_V1);
237}
238
239/********************************************************************************
240 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
241 * Support)
242 *******************************************************************************/
243static inline unsigned int get_armv8_4_feat_nv_support(void)
244{
245 return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) &
246 ID_AA64MMFR2_EL1_NV_MASK));
247}
248
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100249/*******************************************************************************
250 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
251 * Extension)
252 ******************************************************************************/
253static inline bool is_feat_brbe_present(void)
254{
255 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_BRBE_SHIFT) &
256 ID_AA64DFR0_BRBE_MASK) == ID_AA64DFR0_BRBE_SUPPORTED);
257}
258
Jayanth Dodderi Chidananda793ccc2022-05-19 14:08:28 +0100259/*******************************************************************************
260 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
261 ******************************************************************************/
262static inline bool is_feat_trbe_present(void)
263{
264 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEBUFFER_SHIFT) &
265 ID_AA64DFR0_TRACEBUFFER_MASK) == ID_AA64DFR0_TRACEBUFFER_SUPPORTED);
266}
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100267
Antonio Nino Diazc326c342019-01-11 11:20:10 +0000268#endif /* ARCH_FEATURES_H */