developer | c0c0782 | 2021-03-29 16:50:30 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <common/debug.h> |
| 8 | #include <common/runtime_svc.h> |
Rex-BC Chen | b48c6c4 | 2021-04-12 11:10:31 +0800 | [diff] [blame] | 9 | #include <mt_dp.h> |
developer | 0d3844d | 2021-07-09 16:55:51 +0800 | [diff] [blame] | 10 | #include <mt_spm.h> |
| 11 | #include <mt_spm_vcorefs.h> |
developer | 4791789 | 2021-11-01 16:43:47 +0800 | [diff] [blame] | 12 | #include <mtk_apusys.h> |
Rex-BC Chen | b48c6c4 | 2021-04-12 11:10:31 +0800 | [diff] [blame] | 13 | #include <mtk_sip_svc.h> |
Rex-BC Chen | 1790304 | 2021-08-10 11:10:58 +0800 | [diff] [blame] | 14 | #include <plat_dfd.h> |
Rex-BC Chen | b48c6c4 | 2021-04-12 11:10:31 +0800 | [diff] [blame] | 15 | #include "plat_sip_calls.h" |
developer | c0c0782 | 2021-03-29 16:50:30 +0800 | [diff] [blame] | 16 | |
| 17 | uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid, |
| 18 | u_register_t x1, |
| 19 | u_register_t x2, |
| 20 | u_register_t x3, |
| 21 | u_register_t x4, |
| 22 | void *cookie, |
| 23 | void *handle, |
| 24 | u_register_t flags) |
| 25 | { |
Rex-BC Chen | b48c6c4 | 2021-04-12 11:10:31 +0800 | [diff] [blame] | 26 | int32_t ret; |
| 27 | uint32_t ret_val; |
| 28 | |
developer | c0c0782 | 2021-03-29 16:50:30 +0800 | [diff] [blame] | 29 | switch (smc_fid) { |
Rex-BC Chen | b48c6c4 | 2021-04-12 11:10:31 +0800 | [diff] [blame] | 30 | case MTK_SIP_DP_CONTROL_AARCH32: |
| 31 | case MTK_SIP_DP_CONTROL_AARCH64: |
| 32 | ret = dp_secure_handler(x1, x2, &ret_val); |
| 33 | SMC_RET2(handle, ret, ret_val); |
| 34 | break; |
developer | 0d3844d | 2021-07-09 16:55:51 +0800 | [diff] [blame] | 35 | case MTK_SIP_VCORE_CONTROL_ARCH32: |
| 36 | case MTK_SIP_VCORE_CONTROL_ARCH64: |
| 37 | ret = spm_vcorefs_v2_args(x1, x2, x3, &x4); |
| 38 | SMC_RET2(handle, ret, x4); |
| 39 | break; |
Rex-BC Chen | 1790304 | 2021-08-10 11:10:58 +0800 | [diff] [blame] | 40 | case MTK_SIP_KERNEL_DFD_AARCH32: |
| 41 | case MTK_SIP_KERNEL_DFD_AARCH64: |
| 42 | ret = dfd_smc_dispatcher(x1, x2, x3, x4); |
| 43 | SMC_RET1(handle, ret); |
| 44 | break; |
developer | 4791789 | 2021-11-01 16:43:47 +0800 | [diff] [blame] | 45 | case MTK_SIP_APUSYS_CONTROL_AARCH32: |
| 46 | case MTK_SIP_APUSYS_CONTROL_AARCH64: |
| 47 | ret = apusys_kernel_ctrl(x1, x2, x3, x4, &ret_val); |
| 48 | SMC_RET2(handle, ret, ret_val); |
| 49 | break; |
developer | c0c0782 | 2021-03-29 16:50:30 +0800 | [diff] [blame] | 50 | default: |
| 51 | ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); |
| 52 | break; |
| 53 | } |
| 54 | |
| 55 | SMC_RET1(handle, SMC_UNK); |
| 56 | } |