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git01.mediatek.com / filogic / atf / ca14fb81192b9b6f7f067f4f9ccce0f8652bec3d / . / plat / xilinx / versal / platform.mk
blob: 1007e5553f8307961ba8578fcc23bafb24e2511f [file] [log] [blame]
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700[diff] [blame]1# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]2#
3# SPDX-License-Identifier: BSD-3-Clause
4
5override PROGRAMMABLE_RESET_ADDRESS := 1
6PSCI_EXTENDED_STATE_ID := 1
7A53_DISABLE_NON_TEMPORAL_HINT := 0
8SEPARATE_CODE_AND_RODATA := 1
9override RESET_TO_BL31 := 1
10PL011_GENERIC_UART := 1
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]11
12ifdef VERSAL_ATF_MEM_BASE
13 $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
14
15 ifndef VERSAL_ATF_MEM_SIZE
16 $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
17 endif
18 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
19
20 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
21 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
22 endif
23endif
24
25ifdef VERSAL_BL32_MEM_BASE
26 $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
27
28 ifndef VERSAL_BL32_MEM_SIZE
29 $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
30 endif
31 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
32endif
33
Siva Durga Prasad Paladugucbc90052019-07-10 16:15:19 +0530[diff] [blame]34VERSAL_PLATFORM ?= silicon
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]35$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
36
37VERSAL_CONSOLE ?= pl011
38$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
39
Tejas Patel54d13192019-02-27 18:44:55 +0530[diff] [blame]40PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
41 -Iplat/xilinx/common/include/ \
Wendy Lianga4494de2019-01-21 13:45:49 +0530[diff] [blame]42 -Iplat/xilinx/common/ipi_mailbox_service/ \
Tejas Patel354fe572018-12-14 00:55:37 -0800[diff] [blame]43 -Iplat/xilinx/versal/include/ \
44 -Iplat/xilinx/versal/pm_service/
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]45
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]46# Include GICv3 driver files
47include drivers/arm/gic/v3/gicv3.mk
48
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]49PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
50 lib/xlat_tables/aarch64/xlat_tables.c \
51 drivers/delay_timer/delay_timer.c \
52 drivers/delay_timer/generic_delay_timer.c \
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]53 ${GICV3_SOURCES} \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]54 drivers/arm/pl011/aarch64/pl011_console.S \
Ambroise Vincent962109f2019-03-27 13:48:15 +0000[diff] [blame]55 plat/common/aarch64/crash_console_helpers.S \
Tejas Patel54d13192019-02-27 18:44:55 +0530[diff] [blame]56 plat/arm/common/arm_cci.c \
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700[diff] [blame]57 plat/arm/common/arm_common.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]58 plat/common/plat_gicv3.c \
59 plat/xilinx/versal/aarch64/versal_helpers.S \
60 plat/xilinx/versal/aarch64/versal_common.c
61
Tejas Patel54d13192019-02-27 18:44:55 +0530[diff] [blame]62BL31_SOURCES += drivers/arm/cci/cci.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]63 lib/cpus/aarch64/cortex_a72.S \
64 plat/common/plat_psci_common.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800[diff] [blame]65 plat/xilinx/common/ipi.c \
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700[diff] [blame]66 plat/xilinx/common/plat_startup.c \
Wendy Lianga4494de2019-01-21 13:45:49 +0530[diff] [blame]67 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800[diff] [blame]68 plat/xilinx/common/pm_service/pm_ipi.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530[diff] [blame]69 plat/xilinx/versal/bl31_versal_setup.c \
70 plat/xilinx/versal/plat_psci.c \
71 plat/xilinx/versal/plat_versal.c \
72 plat/xilinx/versal/plat_topology.c \
73 plat/xilinx/versal/sip_svc_setup.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800[diff] [blame]74 plat/xilinx/versal/versal_gicv3.c \
75 plat/xilinx/versal/versal_ipi.c \
76 plat/xilinx/versal/pm_service/pm_svc_main.c \
Tejas Patel9d09ff92019-01-08 01:46:35 -0800[diff] [blame]77 plat/xilinx/versal/pm_service/pm_api_sys.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800[diff] [blame]78 plat/xilinx/versal/pm_service/pm_client.c