blob: 78e9b33ce3363fa25a4a1e2b695b35c778009b72 [file] [log] [blame]
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05301# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4
5override PROGRAMMABLE_RESET_ADDRESS := 1
6PSCI_EXTENDED_STATE_ID := 1
7A53_DISABLE_NON_TEMPORAL_HINT := 0
8SEPARATE_CODE_AND_RODATA := 1
9override RESET_TO_BL31 := 1
10PL011_GENERIC_UART := 1
11MULTI_CONSOLE_API := 1
12
13ifdef VERSAL_ATF_MEM_BASE
14 $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
15
16 ifndef VERSAL_ATF_MEM_SIZE
17 $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
18 endif
19 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
20
21 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
22 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
23 endif
24endif
25
26ifdef VERSAL_BL32_MEM_BASE
27 $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
28
29 ifndef VERSAL_BL32_MEM_SIZE
30 $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
31 endif
32 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
33endif
34
35VERSAL_PLATFORM ?= versal_virt
36$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
37
38VERSAL_CONSOLE ?= pl011
39$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
40
41PLAT_INCLUDES := -Iplat/xilinx/versal/include/
42
43PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
44 lib/xlat_tables/aarch64/xlat_tables.c \
45 drivers/delay_timer/delay_timer.c \
46 drivers/delay_timer/generic_delay_timer.c \
47 drivers/arm/gic/common/gic_common.c \
48 drivers/arm/gic/v3/gicv3_main.c \
49 drivers/arm/gic/v3/gicv3_helpers.c \
50 drivers/arm/pl011/aarch64/pl011_console.S \
51 plat/common/plat_gicv3.c \
52 plat/xilinx/versal/aarch64/versal_helpers.S \
53 plat/xilinx/versal/aarch64/versal_common.c
54
55BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
56 lib/cpus/aarch64/cortex_a72.S \
57 plat/common/plat_psci_common.c \
58 plat/xilinx/versal/bl31_versal_setup.c \
59 plat/xilinx/versal/plat_psci.c \
60 plat/xilinx/versal/plat_versal.c \
61 plat/xilinx/versal/plat_topology.c \
62 plat/xilinx/versal/sip_svc_setup.c \
63 plat/xilinx/versal/versal_gicv3.c