Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / c883ce045b3529d7c5ff7de8f7dc376ddee4bd58 / . / plat / rockchip / rk3328 / platform.mk
blob: f96e18bb0ae6496184e1fe2c9df2c95f6e112f8c [file] [log] [blame]
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]1#
Julius Werner65d52672019-05-24 20:37:58 -0700[diff] [blame]2# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]3#
dp-armd91aaae2017-05-10 15:16:15 +0100[diff] [blame]4# SPDX-License-Identifier: BSD-3-Clause
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]5#
6
Heiko Stuebner6892dc32021-02-08 15:44:27 +0100[diff] [blame]7include drivers/arm/gic/v2/gicv2.mk
8
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]9RK_PLAT := plat/rockchip
10RK_PLAT_SOC := ${RK_PLAT}/${PLAT}
11RK_PLAT_COMMON := ${RK_PLAT}/common
12
Christoph Müllner05ceda72019-04-24 09:52:54 +0200[diff] [blame]13DISABLE_BIN_GENERATION := 1
14
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]15PLAT_INCLUDES := -Idrivers/arm/gic/common/ \
16 -Idrivers/arm/gic/v2/ \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]17 -I${RK_PLAT_COMMON}/ \
18 -I${RK_PLAT_COMMON}/include/ \
Heiko Stuebner385476e2019-03-05 13:46:41 +0100[diff] [blame]19 -I${RK_PLAT_COMMON}/aarch64/ \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]20 -I${RK_PLAT_COMMON}/drivers/pmu/ \
21 -I${RK_PLAT_COMMON}/drivers/parameter/ \
22 -I${RK_PLAT_SOC}/ \
23 -I${RK_PLAT_SOC}/drivers/pmu/ \
24 -I${RK_PLAT_SOC}/drivers/soc/ \
25 -I${RK_PLAT_SOC}/include/
26
Heiko Stuebner6892dc32021-02-08 15:44:27 +0100[diff] [blame]27RK_GIC_SOURCES := ${GICV2_SOURCES} \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]28 plat/common/plat_gicv2.c \
29 ${RK_PLAT}/common/rockchip_gicv2.c
30
Julius Wernerf1d230c2019-05-30 16:57:15 -0700[diff] [blame]31PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
32 lib/bl_aux_params/bl_aux_params.c \
Julius Werner65d52672019-05-24 20:37:58 -0700[diff] [blame]33 lib/xlat_tables/aarch64/xlat_tables.c \
Antonio Nino Diaz58230902018-09-24 17:16:20 +0100[diff] [blame]34 lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diaza64b1522018-10-16 16:39:12 +0100[diff] [blame]35 plat/common/aarch64/crash_console_helpers.S \
Antonio Nino Diaz58230902018-09-24 17:16:20 +0100[diff] [blame]36 plat/common/plat_psci_common.c
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]37
Christoph Müllnerb4660d82020-11-20 22:06:16 +0100[diff] [blame]38ifneq (${ENABLE_STACK_PROTECTOR},0)
39PLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c
40endif
41
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]42BL31_SOURCES += ${RK_GIC_SOURCES} \
43 drivers/arm/cci/cci.c \
Antonio Nino Diaz58230902018-09-24 17:16:20 +0100[diff] [blame]44 drivers/ti/uart/aarch64/16550_console.S \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]45 drivers/delay_timer/delay_timer.c \
46 drivers/delay_timer/generic_delay_timer.c \
47 lib/cpus/aarch64/aem_generic.S \
48 lib/cpus/aarch64/cortex_a53.S \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]49 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \
Christoph Müllner81bb0d92019-05-01 17:45:10 +0200[diff] [blame]50 ${RK_PLAT_COMMON}/params_setup.c \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]51 ${RK_PLAT_COMMON}/bl31_plat_setup.c \
Heiko Stuebner385476e2019-03-05 13:46:41 +0100[diff] [blame]52 ${RK_PLAT_COMMON}/aarch64/pmu_sram_cpus_on.S \
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]53 ${RK_PLAT_COMMON}/plat_pm.c \
54 ${RK_PLAT_COMMON}/plat_topology.c \
55 ${RK_PLAT_COMMON}/aarch64/platform_common.c \
56 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \
57 ${RK_PLAT_SOC}/drivers/soc/soc.c
58
Heiko Stuebner384127d2019-12-12 11:55:26 +0100[diff] [blame]59ifdef PLAT_RK_SECURE_DDR_MINILOADER
60BL31_SOURCES += ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c
61endif
62
Julius Wernerc7087782017-06-09 15:22:44 -0700[diff] [blame]63include lib/coreboot/coreboot.mk
Heiko Stuebner6fd5b942019-04-24 20:26:51 +0200[diff] [blame]64include lib/libfdt/libfdt.mk
Julius Wernerc7087782017-06-09 15:22:44 -0700[diff] [blame]65
Simon South00beb5c2019-10-20 15:20:19 -0400[diff] [blame]66# Enable workarounds for selected Cortex-A53 errata
67ERRATA_A53_855873 := 1
Diederik de Haas6a9c7312023-11-27 10:21:37 +0100[diff] [blame]68ERRATA_A53_1530924 := 1
Simon South00beb5c2019-10-20 15:20:19 -0400[diff] [blame]69
tony.xie54973e72017-04-24 16:18:10 +0800[diff] [blame]70$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
71$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER))
David Cunadoc5b0c0f2017-10-31 23:19:21 +0000[diff] [blame]72
73# Do not enable SVE
74ENABLE_SVE_FOR_NS := 0
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +0000[diff] [blame]75
76WORKAROUND_CVE_2017_5715 := 0