blob: f0fd36f9b47a70dcac74c9732bd58c2ee8157025 [file] [log] [blame]
tony.xie54973e72017-04-24 16:18:10 +08001#
2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3#
dp-armd91aaae2017-05-10 15:16:15 +01004# SPDX-License-Identifier: BSD-3-Clause
tony.xie54973e72017-04-24 16:18:10 +08005#
6
7RK_PLAT := plat/rockchip
8RK_PLAT_SOC := ${RK_PLAT}/${PLAT}
9RK_PLAT_COMMON := ${RK_PLAT}/common
10
11PLAT_INCLUDES := -Idrivers/arm/gic/common/ \
12 -Idrivers/arm/gic/v2/ \
13 -Iinclude/plat/common/ \
14 -I${RK_PLAT_COMMON}/ \
15 -I${RK_PLAT_COMMON}/include/ \
16 -I${RK_PLAT_COMMON}/pmusram \
17 -I${RK_PLAT_COMMON}/drivers/pmu/ \
18 -I${RK_PLAT_COMMON}/drivers/parameter/ \
19 -I${RK_PLAT_SOC}/ \
20 -I${RK_PLAT_SOC}/drivers/pmu/ \
21 -I${RK_PLAT_SOC}/drivers/soc/ \
22 -I${RK_PLAT_SOC}/include/
23
24RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
25 drivers/arm/gic/v2/gicv2_main.c \
26 drivers/arm/gic/v2/gicv2_helpers.c \
27 plat/common/plat_gicv2.c \
28 ${RK_PLAT}/common/rockchip_gicv2.c
29
30PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \
31 plat/common/aarch64/plat_psci_common.c
32
33BL31_SOURCES += ${RK_GIC_SOURCES} \
34 drivers/arm/cci/cci.c \
35 drivers/console/console.S \
36 drivers/ti/uart/16550_console.S \
37 drivers/delay_timer/delay_timer.c \
38 drivers/delay_timer/generic_delay_timer.c \
39 lib/cpus/aarch64/aem_generic.S \
40 lib/cpus/aarch64/cortex_a53.S \
41 ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c \
42 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \
43 ${RK_PLAT_COMMON}/bl31_plat_setup.c \
tony.xie54973e72017-04-24 16:18:10 +080044 ${RK_PLAT_COMMON}/pmusram/pmu_sram_cpus_on.S \
45 ${RK_PLAT_COMMON}/plat_pm.c \
46 ${RK_PLAT_COMMON}/plat_topology.c \
47 ${RK_PLAT_COMMON}/aarch64/platform_common.c \
48 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \
49 ${RK_PLAT_SOC}/drivers/soc/soc.c
50
David Cunadoc5b0c0f2017-10-31 23:19:21 +000051ENABLE_PLAT_COMPAT := 0
Julius Wernerf39c8062017-08-02 16:31:04 -070052MULTI_CONSOLE_API := 1
tony.xie54973e72017-04-24 16:18:10 +080053
Julius Wernerc7087782017-06-09 15:22:44 -070054include lib/coreboot/coreboot.mk
55
tony.xie54973e72017-04-24 16:18:10 +080056$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
57$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER))
David Cunadoc5b0c0f2017-10-31 23:19:21 +000058
59# Do not enable SVE
60ENABLE_SVE_FOR_NS := 0
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +000061
62WORKAROUND_CVE_2017_5715 := 0