Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | /* |
Varun Wadekar | 13b4ad0 | 2018-01-26 10:05:02 -0800 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef FLOWCTRL_H |
| 8 | #define FLOWCTRL_H |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 9 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | #include <lib/mmio.h> |
| 11 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 12 | #include <tegra_def.h> |
| 13 | |
Anthony Zhou | 59fd615 | 2017-03-13 15:34:08 +0800 | [diff] [blame] | 14 | #define FLOWCTRL_HALT_CPU0_EVENTS 0x0U |
| 15 | #define FLOWCTRL_WAITEVENT (2U << 29) |
| 16 | #define FLOWCTRL_WAIT_FOR_INTERRUPT (4U << 29) |
| 17 | #define FLOWCTRL_JTAG_RESUME (1U << 28) |
| 18 | #define FLOWCTRL_HALT_SCLK (1U << 27) |
| 19 | #define FLOWCTRL_HALT_LIC_IRQ (1U << 11) |
| 20 | #define FLOWCTRL_HALT_LIC_FIQ (1U << 10) |
| 21 | #define FLOWCTRL_HALT_GIC_IRQ (1U << 9) |
| 22 | #define FLOWCTRL_HALT_GIC_FIQ (1U << 8) |
| 23 | #define FLOWCTRL_HALT_BPMP_EVENTS 0x4U |
| 24 | #define FLOWCTRL_CPU0_CSR 0x8U |
| 25 | #define FLOW_CTRL_CSR_PWR_OFF_STS (1U << 16) |
| 26 | #define FLOWCTRL_CSR_INTR_FLAG (1U << 15) |
| 27 | #define FLOWCTRL_CSR_EVENT_FLAG (1U << 14) |
| 28 | #define FLOWCTRL_CSR_IMMEDIATE_WAKE (1U << 3) |
| 29 | #define FLOWCTRL_CSR_ENABLE (1U << 0) |
| 30 | #define FLOWCTRL_HALT_CPU1_EVENTS 0x14U |
| 31 | #define FLOWCTRL_CPU1_CSR 0x18U |
Varun Wadekar | 13b4ad0 | 2018-01-26 10:05:02 -0800 | [diff] [blame] | 32 | #define FLOW_CTLR_FLOW_DBG_QUAL 0x50U |
| 33 | #define FLOWCTRL_FIQ2CCPLEX_ENABLE (1U << 28) |
Anthony Zhou | 59fd615 | 2017-03-13 15:34:08 +0800 | [diff] [blame] | 34 | #define FLOWCTRL_CC4_CORE0_CTRL 0x6cU |
| 35 | #define FLOWCTRL_WAIT_WFI_BITMAP 0x100U |
| 36 | #define FLOWCTRL_L2_FLUSH_CONTROL 0x94U |
| 37 | #define FLOWCTRL_BPMP_CLUSTER_CONTROL 0x98U |
| 38 | #define FLOWCTRL_BPMP_CLUSTER_PWRON_LOCK (1U << 2) |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 39 | |
Anthony Zhou | 59fd615 | 2017-03-13 15:34:08 +0800 | [diff] [blame] | 40 | #define FLOWCTRL_ENABLE_EXT 12U |
| 41 | #define FLOWCTRL_ENABLE_EXT_MASK 3U |
| 42 | #define FLOWCTRL_PG_CPU_NONCPU 0x1U |
| 43 | #define FLOWCTRL_TURNOFF_CPURAIL 0x2U |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 44 | |
| 45 | static inline uint32_t tegra_fc_read_32(uint32_t off) |
| 46 | { |
| 47 | return mmio_read_32(TEGRA_FLOWCTRL_BASE + off); |
| 48 | } |
| 49 | |
| 50 | static inline void tegra_fc_write_32(uint32_t off, uint32_t val) |
| 51 | { |
| 52 | mmio_write_32(TEGRA_FLOWCTRL_BASE + off, val); |
| 53 | } |
| 54 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 55 | void tegra_fc_cluster_idle(uint32_t midr); |
Varun Wadekar | b2baa89 | 2015-08-27 10:25:29 +0530 | [diff] [blame] | 56 | void tegra_fc_cpu_powerdn(uint32_t mpidr); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 57 | void tegra_fc_cluster_powerdn(uint32_t midr); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 58 | void tegra_fc_cpu_on(int cpu); |
| 59 | void tegra_fc_cpu_off(int cpu); |
Varun Wadekar | 13b4ad0 | 2018-01-26 10:05:02 -0800 | [diff] [blame] | 60 | void tegra_fc_disable_fiq_to_ccplex_routing(void); |
| 61 | void tegra_fc_enable_fiq_to_ccplex_routing(void); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 62 | void tegra_fc_lock_active_cluster(void); |
| 63 | void tegra_fc_reset_bpmp(void); |
Varun Wadekar | 13b4ad0 | 2018-01-26 10:05:02 -0800 | [diff] [blame] | 64 | void tegra_fc_soc_powerdn(uint32_t midr); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 65 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 66 | #endif /* FLOWCTRL_H */ |