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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Vikram Kanigiri07035432015-11-12 18:52:34 +00002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __PLAT_ARM_H__
31#define __PLAT_ARM_H__
32
33#include <bakery_lock.h>
34#include <bl_common.h>
35#include <cassert.h>
36#include <cpu_data.h>
37#include <stdint.h>
Soby Mathewfe3b5762015-10-27 10:31:35 +000038#include <xlat_tables.h>
Dan Handley9df48042015-03-19 18:58:55 +000039
Dan Handley9df48042015-03-19 18:58:55 +000040#define ARM_CASSERT_MMAP \
41 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
42 <= MAX_MMAP_REGIONS, \
43 assert_max_mmap_regions);
44
45/*
46 * Utility functions common to ARM standard platforms
47 */
48
49void arm_configure_mmu_el1(unsigned long total_base,
50 unsigned long total_size,
51 unsigned long ro_start,
52 unsigned long ro_limit
53#if USE_COHERENT_MEM
54 , unsigned long coh_start,
55 unsigned long coh_limit
56#endif
57);
58void arm_configure_mmu_el3(unsigned long total_base,
59 unsigned long total_size,
60 unsigned long ro_start,
61 unsigned long ro_limit
62#if USE_COHERENT_MEM
63 , unsigned long coh_start,
64 unsigned long coh_limit
65#endif
66);
67
68#if IMAGE_BL31
Dan Handley9df48042015-03-19 18:58:55 +000069/*
70 * Use this macro to instantiate lock before it is used in below
71 * arm_lock_xxx() macros
72 */
Vikram Kanigirid79214c2015-09-09 10:52:13 +010073#define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock);
Dan Handley9df48042015-03-19 18:58:55 +000074
75/*
76 * These are wrapper macros to the Coherent Memory Bakery Lock API.
77 */
78#define arm_lock_init() bakery_lock_init(&arm_lock)
79#define arm_lock_get() bakery_lock_get(&arm_lock)
80#define arm_lock_release() bakery_lock_release(&arm_lock)
81
82#else
83
Dan Handley9df48042015-03-19 18:58:55 +000084/*
Juan Castillo7d199412015-12-14 09:35:25 +000085 * Empty macros for all other BL stages other than BL31
Dan Handley9df48042015-03-19 18:58:55 +000086 */
Dan Handley9df48042015-03-19 18:58:55 +000087#define ARM_INSTANTIATE_LOCK
88#define arm_lock_init()
89#define arm_lock_get()
90#define arm_lock_release()
91
92#endif /* IMAGE_BL31 */
93
Soby Mathew7799cf72015-04-16 14:49:09 +010094#if ARM_RECOM_STATE_ID_ENC
95/*
96 * Macros used to parse state information from State-ID if it is using the
97 * recommended encoding for State-ID.
98 */
99#define ARM_LOCAL_PSTATE_WIDTH 4
100#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
101
102/* Macros to construct the composite power state */
103
104/* Make composite power state parameter till power level 0 */
105#if PSCI_EXTENDED_STATE_ID
106
107#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
108 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
109#else
110#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
111 (((lvl0_state) << PSTATE_ID_SHIFT) | \
112 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
113 ((type) << PSTATE_TYPE_SHIFT))
114#endif /* __PSCI_EXTENDED_STATE_ID__ */
115
116/* Make composite power state parameter till power level 1 */
117#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
118 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
119 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
120
Soby Mathewa869de12015-05-08 10:18:59 +0100121/* Make composite power state parameter till power level 2 */
122#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
123 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
124 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
125
Soby Mathew7799cf72015-04-16 14:49:09 +0100126#endif /* __ARM_RECOM_STATE_ID_ENC__ */
127
Dan Handley9df48042015-03-19 18:58:55 +0000128
Dan Handley9df48042015-03-19 18:58:55 +0000129/* IO storage utility functions */
130void arm_io_setup(void);
131
132/* Security utility functions */
133void arm_tzc_setup(void);
134
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100135/* Systimer utility function */
136void arm_configure_sys_timer(void);
137
Dan Handley9df48042015-03-19 18:58:55 +0000138/* PM utility functions */
Soby Mathewfec4eb72015-07-01 16:16:20 +0100139int arm_validate_power_state(unsigned int power_state,
140 psci_power_state_t *req_state);
Soby Mathew0d9e8522015-07-15 13:36:24 +0100141int arm_validate_ns_entrypoint(uintptr_t entrypoint);
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100142void arm_system_pwr_domain_resume(void);
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000143void arm_program_trusted_mailbox(uintptr_t address);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100144
145/* Topology utility function */
146int arm_check_mpidr(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000147
148/* BL1 utility functions */
149void arm_bl1_early_platform_setup(void);
150void arm_bl1_platform_setup(void);
151void arm_bl1_plat_arch_setup(void);
152
153/* BL2 utility functions */
154void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
155void arm_bl2_platform_setup(void);
156void arm_bl2_plat_arch_setup(void);
157uint32_t arm_get_spsr_for_bl32_entry(void);
158uint32_t arm_get_spsr_for_bl33_entry(void);
159
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100160/* BL2U utility functions */
161void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
162 void *plat_info);
163void arm_bl2u_platform_setup(void);
164void arm_bl2u_plat_arch_setup(void);
165
Juan Castillo7d199412015-12-14 09:35:25 +0000166/* BL31 utility functions */
Dan Handley9df48042015-03-19 18:58:55 +0000167void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
168 void *plat_params_from_bl2);
169void arm_bl31_platform_setup(void);
Soby Mathew2fd66be2015-12-09 11:38:43 +0000170void arm_bl31_plat_runtime_setup(void);
Dan Handley9df48042015-03-19 18:58:55 +0000171void arm_bl31_plat_arch_setup(void);
172
173/* TSP utility functions */
174void arm_tsp_early_platform_setup(void);
175
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100176/* FIP TOC validity check */
177int arm_io_is_toc_valid(void);
Dan Handley9df48042015-03-19 18:58:55 +0000178
179/*
180 * Mandatory functions required in ARM standard platforms
181 */
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000182void plat_arm_gic_driver_init(void);
Dan Handley9df48042015-03-19 18:58:55 +0000183void plat_arm_gic_init(void);
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000184void plat_arm_gic_cpuif_enable(void);
185void plat_arm_gic_cpuif_disable(void);
186void plat_arm_gic_pcpu_init(void);
Dan Handley9df48042015-03-19 18:58:55 +0000187void plat_arm_security_setup(void);
188void plat_arm_pwrc_setup(void);
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000189void plat_arm_interconnect_init(void);
190void plat_arm_interconnect_enter_coherency(void);
191void plat_arm_interconnect_exit_coherency(void);
Dan Handley9df48042015-03-19 18:58:55 +0000192
193/*
194 * Optional functions required in ARM standard platforms
195 */
196void plat_arm_io_setup(void);
197int plat_arm_get_alt_image_source(
Juan Castillo3a66aca2015-04-13 17:36:19 +0100198 unsigned int image_id,
199 uintptr_t *dev_handle,
200 uintptr_t *image_spec);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100201unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
Vikram Kanigiri07035432015-11-12 18:52:34 +0000202const mmap_region_t *plat_arm_get_mmap(void);
Dan Handley9df48042015-03-19 18:58:55 +0000203
204#endif /* __PLAT_ARM_H__ */