Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 1 | /* |
Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef SCMI_PRIVATE_H |
| 8 | #define SCMI_PRIVATE_H |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 9 | |
Deepak Pandey | b66a18e | 2018-12-18 17:10:24 +0530 | [diff] [blame] | 10 | #include <lib/mmio.h> |
| 11 | |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 12 | /* |
| 13 | * SCMI power domain management protocol message and response lengths. It is |
| 14 | * calculated as sum of length in bytes of the message header (4) and payload |
| 15 | * area (the number of bytes of parameters or return values in the payload). |
| 16 | */ |
| 17 | #define SCMI_PROTO_VERSION_MSG_LEN 4 |
| 18 | #define SCMI_PROTO_VERSION_RESP_LEN 12 |
| 19 | |
| 20 | #define SCMI_PROTO_MSG_ATTR_MSG_LEN 8 |
| 21 | #define SCMI_PROTO_MSG_ATTR_RESP_LEN 12 |
| 22 | |
Dimitris Papastamos | aeaf1f0 | 2018-04-03 14:58:17 +0100 | [diff] [blame] | 23 | #define SCMI_AP_CORE_RESET_ADDR_SET_MSG_LEN 16 |
| 24 | #define SCMI_AP_CORE_RESET_ADDR_SET_RESP_LEN 8 |
| 25 | |
| 26 | #define SCMI_AP_CORE_RESET_ADDR_GET_MSG_LEN 4 |
| 27 | #define SCMI_AP_CORE_RESET_ADDR_GET_RESP_LEN 20 |
| 28 | |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 29 | #define SCMI_PWR_STATE_SET_MSG_LEN 16 |
| 30 | #define SCMI_PWR_STATE_SET_RESP_LEN 8 |
| 31 | |
| 32 | #define SCMI_PWR_STATE_GET_MSG_LEN 8 |
| 33 | #define SCMI_PWR_STATE_GET_RESP_LEN 12 |
| 34 | |
| 35 | #define SCMI_SYS_PWR_STATE_SET_MSG_LEN 12 |
| 36 | #define SCMI_SYS_PWR_STATE_SET_RESP_LEN 8 |
| 37 | |
| 38 | #define SCMI_SYS_PWR_STATE_GET_MSG_LEN 4 |
| 39 | #define SCMI_SYS_PWR_STATE_GET_RESP_LEN 12 |
| 40 | |
| 41 | /* SCMI message header format bit field */ |
| 42 | #define SCMI_MSG_ID_SHIFT 0 |
| 43 | #define SCMI_MSG_ID_WIDTH 8 |
| 44 | #define SCMI_MSG_ID_MASK ((1 << SCMI_MSG_ID_WIDTH) - 1) |
| 45 | |
| 46 | #define SCMI_MSG_TYPE_SHIFT 8 |
| 47 | #define SCMI_MSG_TYPE_WIDTH 2 |
| 48 | #define SCMI_MSG_TYPE_MASK ((1 << SCMI_MSG_TYPE_WIDTH) - 1) |
| 49 | |
| 50 | #define SCMI_MSG_PROTO_ID_SHIFT 10 |
| 51 | #define SCMI_MSG_PROTO_ID_WIDTH 8 |
| 52 | #define SCMI_MSG_PROTO_ID_MASK ((1 << SCMI_MSG_PROTO_ID_WIDTH) - 1) |
| 53 | |
| 54 | #define SCMI_MSG_TOKEN_SHIFT 18 |
| 55 | #define SCMI_MSG_TOKEN_WIDTH 10 |
| 56 | #define SCMI_MSG_TOKEN_MASK ((1 << SCMI_MSG_TOKEN_WIDTH) - 1) |
| 57 | |
| 58 | |
| 59 | /* SCMI mailbox flags */ |
| 60 | #define SCMI_FLAG_RESP_POLL 0 |
| 61 | #define SCMI_FLAG_RESP_INT 1 |
| 62 | |
| 63 | /* SCMI power domain protocol `POWER_STATE_SET` message flags */ |
| 64 | #define SCMI_PWR_STATE_SET_FLAG_SYNC 0 |
| 65 | #define SCMI_PWR_STATE_SET_FLAG_ASYNC 1 |
| 66 | |
| 67 | /* |
| 68 | * Helper macro to create an SCMI message header given protocol, message id |
| 69 | * and token. |
| 70 | */ |
Daniel Boulby | ddf6d40 | 2018-05-09 12:21:46 +0100 | [diff] [blame] | 71 | #define SCMI_MSG_CREATE(_protocol, _msg_id, _token) \ |
| 72 | ((((_protocol) & SCMI_MSG_PROTO_ID_MASK) << SCMI_MSG_PROTO_ID_SHIFT) | \ |
| 73 | (((_msg_id) & SCMI_MSG_ID_MASK) << SCMI_MSG_ID_SHIFT) | \ |
| 74 | (((_token) & SCMI_MSG_TOKEN_MASK) << SCMI_MSG_TOKEN_SHIFT)) |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 75 | |
| 76 | /* Helper macro to get the token from a SCMI message header */ |
Daniel Boulby | ddf6d40 | 2018-05-09 12:21:46 +0100 | [diff] [blame] | 77 | #define SCMI_MSG_GET_TOKEN(_msg) \ |
| 78 | (((_msg) >> SCMI_MSG_TOKEN_SHIFT) & SCMI_MSG_TOKEN_MASK) |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 79 | |
| 80 | /* SCMI Channel Status bit fields */ |
| 81 | #define SCMI_CH_STATUS_RES0_MASK 0xFFFFFFFE |
| 82 | #define SCMI_CH_STATUS_FREE_SHIFT 0 |
| 83 | #define SCMI_CH_STATUS_FREE_WIDTH 1 |
| 84 | #define SCMI_CH_STATUS_FREE_MASK ((1 << SCMI_CH_STATUS_FREE_WIDTH) - 1) |
| 85 | |
| 86 | /* Helper macros to check and write the channel status */ |
| 87 | #define SCMI_IS_CHANNEL_FREE(status) \ |
| 88 | (!!(((status) >> SCMI_CH_STATUS_FREE_SHIFT) & SCMI_CH_STATUS_FREE_MASK)) |
| 89 | |
| 90 | #define SCMI_MARK_CHANNEL_BUSY(status) do { \ |
| 91 | assert(SCMI_IS_CHANNEL_FREE(status)); \ |
| 92 | (status) &= ~(SCMI_CH_STATUS_FREE_MASK << \ |
| 93 | SCMI_CH_STATUS_FREE_SHIFT); \ |
| 94 | } while (0) |
| 95 | |
| 96 | /* Helper macros to copy arguments to the mailbox payload */ |
| 97 | #define SCMI_PAYLOAD_ARG1(payld_arr, arg1) \ |
| 98 | mmio_write_32((uintptr_t)&payld_arr[0], arg1) |
| 99 | |
| 100 | #define SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2) do { \ |
| 101 | SCMI_PAYLOAD_ARG1(payld_arr, arg1); \ |
| 102 | mmio_write_32((uintptr_t)&payld_arr[1], arg2); \ |
| 103 | } while (0) |
| 104 | |
| 105 | #define SCMI_PAYLOAD_ARG3(payld_arr, arg1, arg2, arg3) do { \ |
| 106 | SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2); \ |
| 107 | mmio_write_32((uintptr_t)&payld_arr[2], arg3); \ |
| 108 | } while (0) |
| 109 | |
| 110 | /* Helper macros to read return values from the mailbox payload */ |
| 111 | #define SCMI_PAYLOAD_RET_VAL1(payld_arr, val1) \ |
| 112 | (val1) = mmio_read_32((uintptr_t)&payld_arr[0]) |
| 113 | |
| 114 | #define SCMI_PAYLOAD_RET_VAL2(payld_arr, val1, val2) do { \ |
| 115 | SCMI_PAYLOAD_RET_VAL1(payld_arr, val1); \ |
| 116 | (val2) = mmio_read_32((uintptr_t)&payld_arr[1]); \ |
| 117 | } while (0) |
| 118 | |
| 119 | #define SCMI_PAYLOAD_RET_VAL3(payld_arr, val1, val2, val3) do { \ |
| 120 | SCMI_PAYLOAD_RET_VAL2(payld_arr, val1, val2); \ |
| 121 | (val3) = mmio_read_32((uintptr_t)&payld_arr[2]); \ |
| 122 | } while (0) |
| 123 | |
Dimitris Papastamos | aeaf1f0 | 2018-04-03 14:58:17 +0100 | [diff] [blame] | 124 | #define SCMI_PAYLOAD_RET_VAL4(payld_arr, val1, val2, val3, val4) do { \ |
| 125 | SCMI_PAYLOAD_RET_VAL3(payld_arr, val1, val2, val3); \ |
| 126 | (val4) = mmio_read_32((uintptr_t)&payld_arr[3]); \ |
| 127 | } while (0) |
| 128 | |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 129 | /* |
| 130 | * Private data structure for representing the mailbox memory layout. Refer |
| 131 | * the SCMI specification for more details. |
| 132 | */ |
| 133 | typedef struct mailbox_mem { |
| 134 | uint32_t res_a; /* Reserved */ |
| 135 | volatile uint32_t status; |
| 136 | uint64_t res_b; /* Reserved */ |
| 137 | uint32_t flags; |
| 138 | volatile uint32_t len; |
sah01 | 526a637 | 2021-12-08 06:29:59 +0000 | [diff] [blame] | 139 | volatile uint32_t msg_header; |
Soby Mathew | ea26bad | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 140 | uint32_t payload[]; |
| 141 | } mailbox_mem_t; |
| 142 | |
| 143 | |
| 144 | /* Private APIs for use within SCMI driver */ |
| 145 | void scmi_get_channel(scmi_channel_t *ch); |
| 146 | void scmi_send_sync_command(scmi_channel_t *ch); |
| 147 | void scmi_put_channel(scmi_channel_t *ch); |
| 148 | |
| 149 | static inline void validate_scmi_channel(scmi_channel_t *ch) |
| 150 | { |
| 151 | assert(ch && ch->is_initialized); |
| 152 | assert(ch->info && ch->info->scmi_mbx_mem); |
| 153 | } |
| 154 | |
Masahisa Kojima | ebfd8eb | 2019-03-07 10:41:54 +0900 | [diff] [blame] | 155 | /* |
| 156 | * SCMI vendor specific protocol |
| 157 | */ |
| 158 | #define SCMI_SYS_VENDOR_EXT_PROTO_ID 0x80 |
| 159 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 160 | #endif /* SCMI_PRIVATE_H */ |