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Soby Mathewea26bad2016-11-14 12:25:45 +00001/*
Samarth Parikh59cfa132017-11-23 14:23:21 +05302 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Soby Mathewea26bad2016-11-14 12:25:45 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __CSS_SCMI_PRIVATE_H__
8#define __CSS_SCMI_PRIVATE_H__
9
10/*
11 * SCMI power domain management protocol message and response lengths. It is
12 * calculated as sum of length in bytes of the message header (4) and payload
13 * area (the number of bytes of parameters or return values in the payload).
14 */
15#define SCMI_PROTO_VERSION_MSG_LEN 4
16#define SCMI_PROTO_VERSION_RESP_LEN 12
17
18#define SCMI_PROTO_MSG_ATTR_MSG_LEN 8
19#define SCMI_PROTO_MSG_ATTR_RESP_LEN 12
20
Dimitris Papastamosaeaf1f02018-04-03 14:58:17 +010021#define SCMI_AP_CORE_RESET_ADDR_SET_MSG_LEN 16
22#define SCMI_AP_CORE_RESET_ADDR_SET_RESP_LEN 8
23
24#define SCMI_AP_CORE_RESET_ADDR_GET_MSG_LEN 4
25#define SCMI_AP_CORE_RESET_ADDR_GET_RESP_LEN 20
26
Soby Mathewea26bad2016-11-14 12:25:45 +000027#define SCMI_PWR_STATE_SET_MSG_LEN 16
28#define SCMI_PWR_STATE_SET_RESP_LEN 8
29
30#define SCMI_PWR_STATE_GET_MSG_LEN 8
31#define SCMI_PWR_STATE_GET_RESP_LEN 12
32
33#define SCMI_SYS_PWR_STATE_SET_MSG_LEN 12
34#define SCMI_SYS_PWR_STATE_SET_RESP_LEN 8
35
36#define SCMI_SYS_PWR_STATE_GET_MSG_LEN 4
37#define SCMI_SYS_PWR_STATE_GET_RESP_LEN 12
38
39/* SCMI message header format bit field */
40#define SCMI_MSG_ID_SHIFT 0
41#define SCMI_MSG_ID_WIDTH 8
42#define SCMI_MSG_ID_MASK ((1 << SCMI_MSG_ID_WIDTH) - 1)
43
44#define SCMI_MSG_TYPE_SHIFT 8
45#define SCMI_MSG_TYPE_WIDTH 2
46#define SCMI_MSG_TYPE_MASK ((1 << SCMI_MSG_TYPE_WIDTH) - 1)
47
48#define SCMI_MSG_PROTO_ID_SHIFT 10
49#define SCMI_MSG_PROTO_ID_WIDTH 8
50#define SCMI_MSG_PROTO_ID_MASK ((1 << SCMI_MSG_PROTO_ID_WIDTH) - 1)
51
52#define SCMI_MSG_TOKEN_SHIFT 18
53#define SCMI_MSG_TOKEN_WIDTH 10
54#define SCMI_MSG_TOKEN_MASK ((1 << SCMI_MSG_TOKEN_WIDTH) - 1)
55
56
57/* SCMI mailbox flags */
58#define SCMI_FLAG_RESP_POLL 0
59#define SCMI_FLAG_RESP_INT 1
60
61/* SCMI power domain protocol `POWER_STATE_SET` message flags */
62#define SCMI_PWR_STATE_SET_FLAG_SYNC 0
63#define SCMI_PWR_STATE_SET_FLAG_ASYNC 1
64
65/*
66 * Helper macro to create an SCMI message header given protocol, message id
67 * and token.
68 */
Daniel Boulbyddf6d402018-05-09 12:21:46 +010069#define SCMI_MSG_CREATE(_protocol, _msg_id, _token) \
70 ((((_protocol) & SCMI_MSG_PROTO_ID_MASK) << SCMI_MSG_PROTO_ID_SHIFT) | \
71 (((_msg_id) & SCMI_MSG_ID_MASK) << SCMI_MSG_ID_SHIFT) | \
72 (((_token) & SCMI_MSG_TOKEN_MASK) << SCMI_MSG_TOKEN_SHIFT))
Soby Mathewea26bad2016-11-14 12:25:45 +000073
74/* Helper macro to get the token from a SCMI message header */
Daniel Boulbyddf6d402018-05-09 12:21:46 +010075#define SCMI_MSG_GET_TOKEN(_msg) \
76 (((_msg) >> SCMI_MSG_TOKEN_SHIFT) & SCMI_MSG_TOKEN_MASK)
Soby Mathewea26bad2016-11-14 12:25:45 +000077
78/* SCMI Channel Status bit fields */
79#define SCMI_CH_STATUS_RES0_MASK 0xFFFFFFFE
80#define SCMI_CH_STATUS_FREE_SHIFT 0
81#define SCMI_CH_STATUS_FREE_WIDTH 1
82#define SCMI_CH_STATUS_FREE_MASK ((1 << SCMI_CH_STATUS_FREE_WIDTH) - 1)
83
84/* Helper macros to check and write the channel status */
85#define SCMI_IS_CHANNEL_FREE(status) \
86 (!!(((status) >> SCMI_CH_STATUS_FREE_SHIFT) & SCMI_CH_STATUS_FREE_MASK))
87
88#define SCMI_MARK_CHANNEL_BUSY(status) do { \
89 assert(SCMI_IS_CHANNEL_FREE(status)); \
90 (status) &= ~(SCMI_CH_STATUS_FREE_MASK << \
91 SCMI_CH_STATUS_FREE_SHIFT); \
92 } while (0)
93
94/* Helper macros to copy arguments to the mailbox payload */
95#define SCMI_PAYLOAD_ARG1(payld_arr, arg1) \
96 mmio_write_32((uintptr_t)&payld_arr[0], arg1)
97
98#define SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2) do { \
99 SCMI_PAYLOAD_ARG1(payld_arr, arg1); \
100 mmio_write_32((uintptr_t)&payld_arr[1], arg2); \
101 } while (0)
102
103#define SCMI_PAYLOAD_ARG3(payld_arr, arg1, arg2, arg3) do { \
104 SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2); \
105 mmio_write_32((uintptr_t)&payld_arr[2], arg3); \
106 } while (0)
107
108/* Helper macros to read return values from the mailbox payload */
109#define SCMI_PAYLOAD_RET_VAL1(payld_arr, val1) \
110 (val1) = mmio_read_32((uintptr_t)&payld_arr[0])
111
112#define SCMI_PAYLOAD_RET_VAL2(payld_arr, val1, val2) do { \
113 SCMI_PAYLOAD_RET_VAL1(payld_arr, val1); \
114 (val2) = mmio_read_32((uintptr_t)&payld_arr[1]); \
115 } while (0)
116
117#define SCMI_PAYLOAD_RET_VAL3(payld_arr, val1, val2, val3) do { \
118 SCMI_PAYLOAD_RET_VAL2(payld_arr, val1, val2); \
119 (val3) = mmio_read_32((uintptr_t)&payld_arr[2]); \
120 } while (0)
121
Dimitris Papastamosaeaf1f02018-04-03 14:58:17 +0100122#define SCMI_PAYLOAD_RET_VAL4(payld_arr, val1, val2, val3, val4) do { \
123 SCMI_PAYLOAD_RET_VAL3(payld_arr, val1, val2, val3); \
124 (val4) = mmio_read_32((uintptr_t)&payld_arr[3]); \
125 } while (0)
126
Soby Mathewea26bad2016-11-14 12:25:45 +0000127/*
128 * Private data structure for representing the mailbox memory layout. Refer
129 * the SCMI specification for more details.
130 */
131typedef struct mailbox_mem {
132 uint32_t res_a; /* Reserved */
133 volatile uint32_t status;
134 uint64_t res_b; /* Reserved */
135 uint32_t flags;
136 volatile uint32_t len;
137 uint32_t msg_header;
138 uint32_t payload[];
139} mailbox_mem_t;
140
141
142/* Private APIs for use within SCMI driver */
143void scmi_get_channel(scmi_channel_t *ch);
144void scmi_send_sync_command(scmi_channel_t *ch);
145void scmi_put_channel(scmi_channel_t *ch);
146
147static inline void validate_scmi_channel(scmi_channel_t *ch)
148{
149 assert(ch && ch->is_initialized);
150 assert(ch->info && ch->info->scmi_mbx_mem);
151}
152
153#endif /* __CSS_SCMI_PRIVATE_H__ */