blob: 1c56364c85abf1297c32966c27efcf00696f4dff [file] [log] [blame]
Ambroise Vincent962109f2019-03-27 13:48:15 +00001# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05302#
3# SPDX-License-Identifier: BSD-3-Clause
4
5override PROGRAMMABLE_RESET_ADDRESS := 1
6PSCI_EXTENDED_STATE_ID := 1
7A53_DISABLE_NON_TEMPORAL_HINT := 0
8SEPARATE_CODE_AND_RODATA := 1
9override RESET_TO_BL31 := 1
10PL011_GENERIC_UART := 1
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053011
12ifdef VERSAL_ATF_MEM_BASE
13 $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
14
15 ifndef VERSAL_ATF_MEM_SIZE
16 $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
17 endif
18 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
19
20 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
21 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
22 endif
23endif
24
25ifdef VERSAL_BL32_MEM_BASE
26 $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
27
28 ifndef VERSAL_BL32_MEM_SIZE
29 $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
30 endif
31 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
32endif
33
34VERSAL_PLATFORM ?= versal_virt
35$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
36
37VERSAL_CONSOLE ?= pl011
38$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
39
40PLAT_INCLUDES := -Iplat/xilinx/versal/include/
41
42PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
43 lib/xlat_tables/aarch64/xlat_tables.c \
44 drivers/delay_timer/delay_timer.c \
45 drivers/delay_timer/generic_delay_timer.c \
46 drivers/arm/gic/common/gic_common.c \
47 drivers/arm/gic/v3/gicv3_main.c \
48 drivers/arm/gic/v3/gicv3_helpers.c \
49 drivers/arm/pl011/aarch64/pl011_console.S \
Ambroise Vincent962109f2019-03-27 13:48:15 +000050 plat/common/aarch64/crash_console_helpers.S \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053051 plat/common/plat_gicv3.c \
52 plat/xilinx/versal/aarch64/versal_helpers.S \
53 plat/xilinx/versal/aarch64/versal_common.c
54
55BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
56 lib/cpus/aarch64/cortex_a72.S \
57 plat/common/plat_psci_common.c \
58 plat/xilinx/versal/bl31_versal_setup.c \
59 plat/xilinx/versal/plat_psci.c \
60 plat/xilinx/versal/plat_versal.c \
61 plat/xilinx/versal/plat_topology.c \
62 plat/xilinx/versal/sip_svc_setup.c \
63 plat/xilinx/versal/versal_gicv3.c