Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 7 | #include <stdint.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | |
| 9 | #include <platform_def.h> |
| 10 | |
| 11 | #include <common/debug.h> |
| 12 | #include <drivers/arm/tzc400.h> |
| 13 | #include <drivers/st/stm32mp1_clk.h> |
| 14 | #include <drivers/st/stm32mp1_rcc.h> |
| 15 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 16 | #include <lib/mmio.h> |
| 17 | |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 18 | #include <stm32mp1_dt.h> |
| 19 | #include <stm32mp1_private.h> |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 20 | |
| 21 | /******************************************************************************* |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 22 | * Initialize the TrustZone Controller. Configure Region 0 with Secure RW access |
| 23 | * and allow Non-Secure masters full access. |
| 24 | ******************************************************************************/ |
| 25 | static void init_tzc400(void) |
| 26 | { |
| 27 | unsigned long long region_base, region_top; |
| 28 | unsigned long long ddr_base = STM32MP1_DDR_BASE; |
| 29 | unsigned long long ddr_size = (unsigned long long)dt_get_ddr_size(); |
| 30 | |
| 31 | tzc400_init(STM32MP1_TZC_BASE); |
| 32 | |
| 33 | tzc400_disable_filters(); |
| 34 | |
| 35 | /* Region 1 set to cover all DRAM at 0xC000_0000. Apply the |
| 36 | * same configuration to all filters in the TZC. |
| 37 | */ |
| 38 | region_base = ddr_base; |
| 39 | region_top = ddr_base + (ddr_size - 1U); |
| 40 | tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1, |
| 41 | region_base, |
| 42 | region_top, |
| 43 | TZC_REGION_S_RDWR, |
| 44 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID) | |
| 45 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_GPU_ID) | |
| 46 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) | |
| 47 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) | |
| 48 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) | |
| 49 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) | |
| 50 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) | |
| 51 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID) | |
| 52 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_ETH_ID) | |
| 53 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DAP_ID)); |
| 54 | |
| 55 | /* Raise an exception if a NS device tries to access secure memory */ |
| 56 | tzc400_set_action(TZC_ACTION_ERR); |
| 57 | |
| 58 | tzc400_enable_filters(); |
| 59 | } |
| 60 | |
| 61 | /******************************************************************************* |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 62 | * Initialize the TrustZone Controller. |
| 63 | * Early initialization create only one region with full access to secure. |
| 64 | * This setting is used before and during DDR initialization. |
| 65 | ******************************************************************************/ |
| 66 | static void early_init_tzc400(void) |
| 67 | { |
| 68 | uint32_t rstsr, rst_standby; |
| 69 | |
| 70 | rstsr = mmio_read_32(RCC_BASE + RCC_MP_RSTSCLRR); |
| 71 | |
| 72 | /* No warning if return from (C)STANDBY */ |
| 73 | rst_standby = rstsr & |
| 74 | (RCC_MP_RSTSCLRR_STDBYRSTF | RCC_MP_RSTSCLRR_CSTDBYRSTF); |
| 75 | |
| 76 | if (stm32mp1_clk_is_enabled(TZC1) && (rst_standby == 0U)) { |
| 77 | WARN("TZC400 port 1 clock already enable\n"); |
| 78 | } |
| 79 | |
| 80 | if (stm32mp1_clk_is_enabled(TZC2) && (rst_standby == 0U)) { |
| 81 | WARN("TZC400 port 2 clock already enable\n"); |
| 82 | } |
| 83 | |
| 84 | if (stm32mp1_clk_enable(TZC1) != 0) { |
| 85 | ERROR("Cannot enable TZC1 clock\n"); |
| 86 | panic(); |
| 87 | } |
| 88 | if (stm32mp1_clk_enable(TZC2) != 0) { |
| 89 | ERROR("Cannot enable TZC2 clock\n"); |
| 90 | panic(); |
| 91 | } |
| 92 | |
| 93 | tzc400_init(STM32MP1_TZC_BASE); |
| 94 | |
| 95 | tzc400_disable_filters(); |
| 96 | |
| 97 | /* |
| 98 | * Region 1 set to cover Non-Secure DRAM at 0x8000_0000. Apply the |
| 99 | * same configuration to all filters in the TZC. |
| 100 | */ |
| 101 | tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1, |
| 102 | STM32MP1_DDR_BASE, |
| 103 | STM32MP1_DDR_BASE + |
| 104 | (STM32MP1_DDR_MAX_SIZE - 1U), |
| 105 | TZC_REGION_S_RDWR, |
| 106 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID)); |
| 107 | |
| 108 | /* Raise an exception if a NS device tries to access secure memory */ |
| 109 | tzc400_set_action(TZC_ACTION_ERR); |
| 110 | |
| 111 | tzc400_enable_filters(); |
| 112 | } |
| 113 | |
| 114 | /******************************************************************************* |
| 115 | * Initialize the secure environment. At this moment only the TrustZone |
| 116 | * Controller is initialized. |
| 117 | ******************************************************************************/ |
| 118 | void stm32mp1_arch_security_setup(void) |
| 119 | { |
| 120 | early_init_tzc400(); |
| 121 | } |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 122 | |
| 123 | /******************************************************************************* |
| 124 | * Initialize the secure environment. At this moment only the TrustZone |
| 125 | * Controller is initialized. |
| 126 | ******************************************************************************/ |
| 127 | void stm32mp1_security_setup(void) |
| 128 | { |
| 129 | init_tzc400(); |
| 130 | } |