Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <debug.h> |
| 8 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 9 | #include <mmio.h> |
| 10 | #include <stdint.h> |
| 11 | #include <stm32mp1_clk.h> |
| 12 | #include <stm32mp1_dt.h> |
| 13 | #include <stm32mp1_private.h> |
| 14 | #include <stm32mp1_rcc.h> |
| 15 | #include <tzc400.h> |
| 16 | #include "platform_def.h" |
| 17 | |
| 18 | /******************************************************************************* |
| 19 | * Initialize the TrustZone Controller. |
| 20 | * Early initialization create only one region with full access to secure. |
| 21 | * This setting is used before and during DDR initialization. |
| 22 | ******************************************************************************/ |
| 23 | static void early_init_tzc400(void) |
| 24 | { |
| 25 | uint32_t rstsr, rst_standby; |
| 26 | |
| 27 | rstsr = mmio_read_32(RCC_BASE + RCC_MP_RSTSCLRR); |
| 28 | |
| 29 | /* No warning if return from (C)STANDBY */ |
| 30 | rst_standby = rstsr & |
| 31 | (RCC_MP_RSTSCLRR_STDBYRSTF | RCC_MP_RSTSCLRR_CSTDBYRSTF); |
| 32 | |
| 33 | if (stm32mp1_clk_is_enabled(TZC1) && (rst_standby == 0U)) { |
| 34 | WARN("TZC400 port 1 clock already enable\n"); |
| 35 | } |
| 36 | |
| 37 | if (stm32mp1_clk_is_enabled(TZC2) && (rst_standby == 0U)) { |
| 38 | WARN("TZC400 port 2 clock already enable\n"); |
| 39 | } |
| 40 | |
| 41 | if (stm32mp1_clk_enable(TZC1) != 0) { |
| 42 | ERROR("Cannot enable TZC1 clock\n"); |
| 43 | panic(); |
| 44 | } |
| 45 | if (stm32mp1_clk_enable(TZC2) != 0) { |
| 46 | ERROR("Cannot enable TZC2 clock\n"); |
| 47 | panic(); |
| 48 | } |
| 49 | |
| 50 | tzc400_init(STM32MP1_TZC_BASE); |
| 51 | |
| 52 | tzc400_disable_filters(); |
| 53 | |
| 54 | /* |
| 55 | * Region 1 set to cover Non-Secure DRAM at 0x8000_0000. Apply the |
| 56 | * same configuration to all filters in the TZC. |
| 57 | */ |
| 58 | tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1, |
| 59 | STM32MP1_DDR_BASE, |
| 60 | STM32MP1_DDR_BASE + |
| 61 | (STM32MP1_DDR_MAX_SIZE - 1U), |
| 62 | TZC_REGION_S_RDWR, |
| 63 | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID)); |
| 64 | |
| 65 | /* Raise an exception if a NS device tries to access secure memory */ |
| 66 | tzc400_set_action(TZC_ACTION_ERR); |
| 67 | |
| 68 | tzc400_enable_filters(); |
| 69 | } |
| 70 | |
| 71 | /******************************************************************************* |
| 72 | * Initialize the secure environment. At this moment only the TrustZone |
| 73 | * Controller is initialized. |
| 74 | ******************************************************************************/ |
| 75 | void stm32mp1_arch_security_setup(void) |
| 76 | { |
| 77 | early_init_tzc400(); |
| 78 | } |