Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 31 | #include <arch.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 32 | #include <arch_helpers.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 33 | #include <assert.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 34 | #include <bl_common.h> |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 35 | #include <bl31.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 36 | #include <context.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 37 | #include <context_mgmt.h> |
Andrew Thoelke | c02dbd6 | 2014-06-02 10:00:25 +0100 | [diff] [blame^] | 38 | #include <cpu_data.h> |
Achin Gupta | 191e86e | 2014-05-09 10:03:15 +0100 | [diff] [blame] | 39 | #include <interrupt_mgmt.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 40 | #include <platform.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 41 | #include <platform_def.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 42 | #include <runtime_svc.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 43 | |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 44 | |
| 45 | /******************************************************************************* |
| 46 | * Context management library initialisation routine. This library is used by |
| 47 | * runtime services to share pointers to 'cpu_context' structures for the secure |
| 48 | * and non-secure states. Management of the structures and their associated |
| 49 | * memory is not done by the context management library e.g. the PSCI service |
| 50 | * manages the cpu context used for entry from and exit to the non-secure state. |
| 51 | * The Secure payload dispatcher service manages the context(s) corresponding to |
| 52 | * the secure state. It also uses this library to get access to the non-secure |
| 53 | * state cpu context pointers. |
| 54 | * Lastly, this library provides the api to make SP_EL3 point to the cpu context |
| 55 | * which will used for programming an entry into a lower EL. The same context |
| 56 | * will used to save state upon exception entry from that EL. |
| 57 | ******************************************************************************/ |
| 58 | void cm_init() |
| 59 | { |
| 60 | /* |
| 61 | * The context management library has only global data to intialize, but |
| 62 | * that will be done when the BSS is zeroed out |
| 63 | */ |
| 64 | } |
| 65 | |
| 66 | /******************************************************************************* |
| 67 | * This function returns a pointer to the most recent 'cpu_context' structure |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 68 | * for the CPU identified by MPIDR that was set as the context for the specified |
| 69 | * security state. NULL is returned if no such structure has been specified. |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 70 | ******************************************************************************/ |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 71 | void *cm_get_context_by_mpidr(uint64_t mpidr, uint32_t security_state) |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 72 | { |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 73 | assert(security_state <= NON_SECURE); |
| 74 | |
Andrew Thoelke | c02dbd6 | 2014-06-02 10:00:25 +0100 | [diff] [blame^] | 75 | return get_cpu_data_by_mpidr(mpidr, cpu_context[security_state]); |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | /******************************************************************************* |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 79 | * This function sets the pointer to the current 'cpu_context' structure for the |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 80 | * specified security state for the CPU identified by MPIDR |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 81 | ******************************************************************************/ |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 82 | void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_state) |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 83 | { |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 84 | assert(security_state <= NON_SECURE); |
| 85 | |
Andrew Thoelke | c02dbd6 | 2014-06-02 10:00:25 +0100 | [diff] [blame^] | 86 | set_cpu_data_by_mpidr(mpidr, cpu_context[security_state], context); |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | /******************************************************************************* |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 90 | * The next four functions are used by runtime services to save and restore EL3 |
| 91 | * and EL1 contexts on the 'cpu_context' structure for the specified security |
| 92 | * state. |
| 93 | ******************************************************************************/ |
| 94 | void cm_el3_sysregs_context_save(uint32_t security_state) |
| 95 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 96 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 97 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 98 | ctx = cm_get_context(security_state); |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 99 | assert(ctx); |
| 100 | |
| 101 | el3_sysregs_context_save(get_el3state_ctx(ctx)); |
| 102 | } |
| 103 | |
| 104 | void cm_el3_sysregs_context_restore(uint32_t security_state) |
| 105 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 106 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 107 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 108 | ctx = cm_get_context(security_state); |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 109 | assert(ctx); |
| 110 | |
| 111 | el3_sysregs_context_restore(get_el3state_ctx(ctx)); |
| 112 | } |
| 113 | |
| 114 | void cm_el1_sysregs_context_save(uint32_t security_state) |
| 115 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 116 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 117 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 118 | ctx = cm_get_context(security_state); |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 119 | assert(ctx); |
| 120 | |
| 121 | el1_sysregs_context_save(get_sysregs_ctx(ctx)); |
| 122 | } |
| 123 | |
| 124 | void cm_el1_sysregs_context_restore(uint32_t security_state) |
| 125 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 126 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 127 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 128 | ctx = cm_get_context(security_state); |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 129 | assert(ctx); |
| 130 | |
| 131 | el1_sysregs_context_restore(get_sysregs_ctx(ctx)); |
| 132 | } |
| 133 | |
| 134 | /******************************************************************************* |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 135 | * This function populates 'cpu_context' pertaining to the given security state |
| 136 | * with the entrypoint, SPSR and SCR values so that an ERET from this security |
| 137 | * state correctly restores corresponding values to drop the CPU to the next |
| 138 | * exception level |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 139 | ******************************************************************************/ |
| 140 | void cm_set_el3_eret_context(uint32_t security_state, uint64_t entrypoint, |
| 141 | uint32_t spsr, uint32_t scr) |
| 142 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 143 | cpu_context_t *ctx; |
| 144 | el3_state_t *state; |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 145 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 146 | ctx = cm_get_context(security_state); |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 147 | assert(ctx); |
| 148 | |
Achin Gupta | 191e86e | 2014-05-09 10:03:15 +0100 | [diff] [blame] | 149 | /* Program the interrupt routing model for this security state */ |
| 150 | scr &= ~SCR_FIQ_BIT; |
| 151 | scr &= ~SCR_IRQ_BIT; |
| 152 | scr |= get_scr_el3_from_routing_model(security_state); |
| 153 | |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 154 | /* Populate EL3 state so that we've the right context before doing ERET */ |
| 155 | state = get_el3state_ctx(ctx); |
| 156 | write_ctx_reg(state, CTX_SPSR_EL3, spsr); |
| 157 | write_ctx_reg(state, CTX_ELR_EL3, entrypoint); |
| 158 | write_ctx_reg(state, CTX_SCR_EL3, scr); |
| 159 | } |
| 160 | |
| 161 | /******************************************************************************* |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 162 | * This function populates ELR_EL3 member of 'cpu_context' pertaining to the |
| 163 | * given security state with the given entrypoint |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 164 | ******************************************************************************/ |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 165 | void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint) |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 166 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 167 | cpu_context_t *ctx; |
| 168 | el3_state_t *state; |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 169 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 170 | ctx = cm_get_context(security_state); |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 171 | assert(ctx); |
| 172 | |
| 173 | /* Populate EL3 state so that ERET jumps to the correct entry */ |
| 174 | state = get_el3state_ctx(ctx); |
| 175 | write_ctx_reg(state, CTX_ELR_EL3, entrypoint); |
| 176 | } |
| 177 | |
| 178 | /******************************************************************************* |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 179 | * This function updates a single bit in the SCR_EL3 member of the 'cpu_context' |
| 180 | * pertaining to the given security state using the value and bit position |
| 181 | * specified in the parameters. It preserves all other bits. |
| 182 | ******************************************************************************/ |
| 183 | void cm_write_scr_el3_bit(uint32_t security_state, |
| 184 | uint32_t bit_pos, |
| 185 | uint32_t value) |
| 186 | { |
| 187 | cpu_context_t *ctx; |
| 188 | el3_state_t *state; |
| 189 | uint32_t scr_el3; |
| 190 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 191 | ctx = cm_get_context(security_state); |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 192 | assert(ctx); |
| 193 | |
| 194 | /* Ensure that the bit position is a valid one */ |
| 195 | assert((1 << bit_pos) & SCR_VALID_BIT_MASK); |
| 196 | |
| 197 | /* Ensure that the 'value' is only a bit wide */ |
| 198 | assert(value <= 1); |
| 199 | |
| 200 | /* |
| 201 | * Get the SCR_EL3 value from the cpu context, clear the desired bit |
| 202 | * and set it to its new value. |
| 203 | */ |
| 204 | state = get_el3state_ctx(ctx); |
| 205 | scr_el3 = read_ctx_reg(state, CTX_SCR_EL3); |
| 206 | scr_el3 &= ~(1 << bit_pos); |
| 207 | scr_el3 |= value << bit_pos; |
| 208 | write_ctx_reg(state, CTX_SCR_EL3, scr_el3); |
| 209 | } |
| 210 | |
| 211 | /******************************************************************************* |
| 212 | * This function retrieves SCR_EL3 member of 'cpu_context' pertaining to the |
| 213 | * given security state. |
| 214 | ******************************************************************************/ |
| 215 | uint32_t cm_get_scr_el3(uint32_t security_state) |
| 216 | { |
| 217 | cpu_context_t *ctx; |
| 218 | el3_state_t *state; |
| 219 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 220 | ctx = cm_get_context(security_state); |
Achin Gupta | 27b895e | 2014-05-04 18:38:28 +0100 | [diff] [blame] | 221 | assert(ctx); |
| 222 | |
| 223 | /* Populate EL3 state so that ERET jumps to the correct entry */ |
| 224 | state = get_el3state_ctx(ctx); |
| 225 | return read_ctx_reg(state, CTX_SCR_EL3); |
| 226 | } |
| 227 | |
| 228 | /******************************************************************************* |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 229 | * This function is used to program the context that's used for exception |
| 230 | * return. This initializes the SP_EL3 to a pointer to a 'cpu_context' set for |
| 231 | * the required security state |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 232 | ******************************************************************************/ |
| 233 | void cm_set_next_eret_context(uint32_t security_state) |
| 234 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 235 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 236 | #if DEBUG |
| 237 | uint64_t sp_mode; |
| 238 | #endif |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 239 | |
Andrew Thoelke | a2f6553 | 2014-05-14 17:09:32 +0100 | [diff] [blame] | 240 | ctx = cm_get_context(security_state); |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 241 | assert(ctx); |
| 242 | |
| 243 | #if DEBUG |
| 244 | /* |
| 245 | * Check that this function is called with SP_EL0 as the stack |
| 246 | * pointer |
| 247 | */ |
| 248 | __asm__ volatile("mrs %0, SPSel\n" |
| 249 | : "=r" (sp_mode)); |
| 250 | |
| 251 | assert(sp_mode == MODE_SP_EL0); |
| 252 | #endif |
| 253 | |
| 254 | __asm__ volatile("msr spsel, #1\n" |
| 255 | "mov sp, %0\n" |
| 256 | "msr spsel, #0\n" |
| 257 | : : "r" (ctx)); |
| 258 | } |